AD9101

–8–

REV. 0

Deglitcher

Many recently announced video-speed digital-to-analog con-

verters feature very low glitch impulse. This is the result of de-

sign emphasis on spurious free dynamic range (SFDR), a key

spec for the emerging direct digital synthesis (DDS) market.

These DACs have extremely low spurs and often do not require

deglitching.

Although their specs are impressive, these DACs may suffer har-

monic distortion, especially at higher clock rates. Therefore, a

deglitcher using the AD9101 can improve SFDR in some cases.

Figure 7 illustrates the block diagram for deglitching an

AD9713, 12-bit DAC.

SAMPLING

AMPLIFIER

(AD9101)

LOW

DISTORTION

OUTPUT

12

DAC

(AD9713)

DDS

ACCUMULATOR

(AD9955)

CLK1

CLK2

CLK3

32

TUNING

WORD

Figure 7. Deglitcher Block Diagram

IF-to-Digital Conversion

Traditional receivers with information encoded with in phase (I)

and quadrature (Q) signals comprise extensive analog signal

processing ahead of the pair of ADCs.

This I-Q demodulation in the analog domain requires precise

gain and phase matching as well as close matching of the ADCs.

This leads to high cost both in materials and labor to attain the

desired performance. Digital front end designers have paid the

cost for these components because ADCs have limited the dy-

namic range at higher signal frequencies.

IF

BPF

DSP

I

Q

NUMERICALLY

CONTROLLED

OSCILLATOR

(NCO)

ADC

ANALOG

INPUT

H (z)

H (z)

12

AD9101

Figure 9. Direct IF-to-Digital

Thus, the final IF signal was mixed with quadrature signals

from the final LO. The two resultant baseband signals repre-

senting I and Q were digitized by independent converters.

IF

BPF

QUADRATURE

DEMODULATOR

90°

LOCAL

OSC.

ADC

ADC

DSP

I

Q

ANALOG

INPUT

Figure 8. Traditional l-Q Demodulation

This method, shown in block form in Figure 8, relies heavily on

accuracy of the phase of the analog I and Q signals applied to

the ADCs. As little as 0.5

° of phase error can reduce system dy-

namic range by 6 dB or more.

Using the bandwidth and low distortion of the AD9101 greatly

simplifies the analog front end and allows signal processing to

be done in the digital domain which is more predictable and less

susceptible to environmental changes. The simplified front end

is illustrated in Figure 9.

This configuration removes the burden from the analog section.

The AD9101 expands the dynamic range of the ADC into the

IF bandwidth, allowing straightforward digital algorithms to de-

modulate the I and Q data.