AD9841A datasheet(21/23 Pages) AD

21 / 23 page

REV. 0

AD9841A/AD9842A

–21–

CCD

CCDIN

BUFFER

VOUT

0.1 F

AD984xA

ADCOUT

DATA

SERIAL

INTERFACE

DIGITAL

OUTPUTS

DIGITAL IMAGE

PROCESSING

ASIC

TIMING

GENERATOR

V-DRIVE

CCD

TIMING

CDS/CLAMP

TIMING

Figure 32. AD984xA System Applications Diagram

13 14 15 16 17 18 19 20 21 22 23 24

48 47 46 45 44

39 38

43 42 41 40

PIN 1

IDENTIFIER

TOP VIEW

(Not to Scale)

AUX1IN

AVSS

AUX2IN

AVDD2

BYP4

CCDIN

BYP2

BYP1

AVDD1

AVSS

(LSB) D0

(MSB) D9

AD9841A

0.1 F

ANALOG SUPPLY

CCD SIGNAL

ANALOG SUPPLY

DATA

OUTPUTS

SERIAL

INTERFACE

0.1 F

1.0 F

0.1 F

ANALOG SUPPLY

CLOCK

INPUTS

0.1 F

ANALOG SUPPLY

DRIVER

SUPPLY

NC = NO CONNECT

Figure 33. AD9841A Recommended Circuit Configuration for CCD-Mode

APPLICATIONS INFORMATION

The AD9841A and AD9842A are complete Analog Front End

(AFE) products for digital still camera and camcorder appli-

cations. As shown in Figure 32, the CCD image (pixel) data is

buffered and sent to the AD984xA analog input through a series

input capacitor. The AD984xA performs the dc restoration,

CDS, gain adjustment, black level correction, and analog-to-

digital conversion. The AD984xA’s digital output data is then

processed by the image processing ASIC. The internal regis-

ters of the AD984xA—used to control gain, offset level, and other

functions—are programmed by the ASIC or microprocessor

through a 3-wire serial digital interface. A system timing gen-

erator provides the clock signals for both the CCD and the AFE.

AD9841A Datasheet(PDF) 21 Page - Analog Devices

AD9841A Datasheet(HTML) 21 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

Datasheet Descarga

Enlace URL