AD9852 datasheet(25/42 Pages) AD

25 / 42 page

AD9852

–25–

REV. 0

Table V. Register Layout. Shaded Sections Comprise the Control Register

Parallel

Serial

Address

AD9852 Register Layout

Default

Hex

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value

Phase Adjust Register #1 <13:8> (Bits 15, 14 don’t care)

Phase 1

00h

Phase Adjust Register #1 <7:0>

00h

Phase Adjust Register #2 <13:8:> (Bits 15, 14 don’t care)

Phase 2

00h

Phase Adjust Register #2 <7:0>

00h

Frequency Tuning Word 1 <47:0>

Frequency 1

00h

Frequency Tuning Word 1 <39:32>

00h

Frequency Tuning Word 1 <31:24>

00h

Frequency Tuning Word 1 <23:16>

00h

Frequency Tuning Word 1 <15:8>

00h

Frequency Tuning Word 1 <7:0>

00h

Frequency Tuning Word 2 <47:40>

Frequency 2

00h

Frequency Tuning Word 2 <39:32>

00h

Frequency Tuning Word 2 <31:24>

00h

Frequency Tuning Word 2 <23:16>

00h

Frequency Tuning Word 2 <15:8>

00h

Frequency Tuning Word 2 <7:0>

00h

Delta Frequency Word <47:40>

00h

Delta Frequency Word <39:32>

00h

Delta Frequency Word <31:24>

00h

Delta Frequency Word <23:16>

00h

Delta Frequency Word <15:8>

00h

Delta Frequency Word <7:0>

00h

Update Clock <31:24>

00h

Update Clock <23:16>

00h

Update Clock <15:8>

00h

Update Clock <7:0>

40h

Ramp Rate Clock <19:16> (Bits 23, 22, 21, 20 don’t care)

00h

Ramp Rate Clock <15:8>

00h

Ramp Rate Clock <7:0>

00h

Don’t

Comp PD

Reserved,

Control

DAC PD

DIG PD

00h

Care

Always

DAC PD

Low

Don’t

PLL

Bypass

Ref Mult 4

Ref Mult 3

Ref Mult 2

Ref Mult 1

Ref Mult 0

64h

Care

Range

PLL

CLR

Triangle

Don’t Care

Mode 2

Mode 1

Mode 0

Int Update

01h

ACC 1

ACC 2

Clk

Don’t

Bypass

OSK EN

OSK INT

Don’t

LSB First

SDO

20h

Care

Inv

Care

Active

Sinc

Output Shape Key I Mult <11:8> (Bits 15, 14, 13, 12 don’t care)

00h

Output Shape Key I Mult <7:0>

00h

Output Shape Key Q Mult <11:8> (Bits 15, 14, 13, 12 don’t care)

00h

Output Shape Key Q Mult <7:0>

00h

Output Shape Key Ramp Rate <7:0>

80h

QDAC <11:8> (Bits 15, 14, 13, 12 don’t care)

00h

QDAC <7:0>

(Data is required to be in twos-complement format)

00h

AD9852 Datasheet(PDF) 25 Page - Analog Devices

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