OP484EP datasheet(14/20 Pages) AD

14 / 20 page

REV. 0

–14–

OP184/OP284/OP484

A +5 V Only, 12-Bit DAC Swings Rail-to-Rail

The OP284 is ideal for use with a CMOS DAC to generate a

digitally-controlled voltage with a wide output range. Figure 51

shows a DAC8043 used in conjunction with the AD589 to gen-

erate a voltage output from 0 V to 1.23 V. The DAC is actually

operating in “voltage switching” mode where the reference is

connected to the current output, IOUT, and the output voltage is

taken from the VREF pin. This topology is inherently noninvert-

ing as opposed to the classic current output mode, which is

inverting and not usable in single supply applications.

VOUT = –––– (5V)

4096

100k

Ω

+5V

1/2

OP284

32.4k

Ω

232

Ω

17.8k

Ω

AD589

GND CLK SR1

VREF

RFB

VDD

IOUT

1.23V

4765

DAC8043

+5V

DIGITAL

CONTROL

Figure 51. A +5 V Only, 12-Bit DAC Swings Rail-to-Rail

In this application the OP284 serves two functions. First, it

buffers the high output impedance of the DAC’s VREF pin,

which is on the order of 10 k

Ω. The op amp provides a low

impedance output to drive any following circuitry. Second, the

op amp amplifies the output signal to provide a rail-to-rail out-

put swing. In this particular case, the gain is set to 4.1 so that

the circuit generates a 5 V output when the DAC output is at

full scale. If other output voltage ranges are needed, such as 0 V

≤ V

OUT

≤ 4.095 V, the gain can easily be changed by adjusting

the values of R2 and R3.

A High-Side Current Monitor

In the design of power supply control circuits, a great deal of

design effort is focused on ensuring a pass transistor’s long-term

reliability over a wide range of load current conditions. As a

result, monitoring and limiting device power dissipation is of

prime importance in these designs. The circuit illustrated in

Figure 52 is an example of a +3 V, single-supply high-side cur-

rent monitor that can be incorporated into the design of a volt-

age regulator with fold-back current limiting or a high current

power supply with crowbar protection. This design uses an

OP284’s rail-to-rail input voltage range to sense the voltage

drop across a 0.1

Ω current shunt. A p-channel MOSFET used

as the feedback element in the circuit converts the op amp’s dif-

ferential input voltage into a current. This current is then ap-

plied to R2 to generate a voltage that is a linear representation

of the load current. The transfer equation for the current

monitor is given by:

Monitor Output

= R2 ×

RSENSE









× I

For the element values shown, the Monitor Output’s transfer

characteristic is 2.5 V/A.

+3V

0.1µF

RSENSE

0.1

Ω

+3V

I L

1/2

AD284

Si9433

MONITOR

OUTPUT

+3V

2.49k

Ω

100

Ω

Figure 52. A High-Side Load Current Monitor

Capacitive Load Drive Capability

The OP284 exhibits excellent capacitive load driving capabili-

ties. It can drive up to 1 nF as shown in Figure 27. However,

even though the device is stable, a capacitive load does not come

without penalty in bandwidth. The bandwidth is reduced to

under 1 MHz for loads greater than 2 nF. A “snubber” network

on the output doesn’t increase the bandwidth, but it does sig-

nificantly reduce the amount of overshoot for a given capacitive

load. A snubber consists of a series R-C network (RS, CS), as

shown in Figure 53, connected from the output of the device to

ground. This network operates in parallel with the load capaci-

tor, CL, to provide the necessary phase lag compensation. The

value of the resistor and capacitor is best determined empirically.

+5V

1/2

OP284

Ω

1nF

100nF

VIN

100mVp-p

0.1µF

VOUT

Figure 53. Snubber Network Compensates for Capacitive

Load

The first step is to determine the value of the resistor RS. A

good starting value is 100

Ω (typically, the optimum value will

be less than 100

Ω). This value is reduced until the small-signal

transient response is optimized. Next, CS is determined—10

µF

is a good starting point. This value is reduced to the smallest

value for acceptable performance (typically, 1

µF). For the case

of a 10 nF load capacitor on the OP284, the optimal snubber

network is a 20

Ω in series with 1 µF. The benefit is immedi-

ately apparent as shown in the scope photo in Figure 54. The

top trace was taken with a 1 nF load, and the bottom trace was

taken with the 50

Ω, 100 nF snubber network in place. The

amount of overshoot and ringing is dramatically reduced. Table I

below illustrates a few sample snubber networks for large load

capacitors.

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