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LSM303DLHC Datasheet(PDF) 20 Page - STMicroelectronics

No. de pieza LSM303DLHC
Descripción Electrónicos  Ultra compact high performance e-compass 3D accelerometer and 3D magnetometer module
PDF  43 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

LSM303DLHC Datasheet(HTML) 20 Page - STMicroelectronics

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Digital interfaces
LSM303DLHC
20/42
Doc ID 018771 Rev 1
5.1.2
Linear acceleration digital interface
For linear acceleration the default (factory) 7-bit slave address is 0011001b.
The slave address is completed with a Read/Write bit. If the bit is ‘1’ (read), a repeated
START (SR) condition must be issued after the two sub-address bytes; if the bit is ‘0’ (write)
the master transmits to the slave with the direction unchanged.
Table 14 explains how the
ead/write bit pattern is composed, listing all the possible configurations.
In order to read multiple bytes, it is necessary to assert the most significant bit of the sub-
address field. In other words, SUB(7) must be equal to 1 while SUB(6-0) represents the
address of the first register to be read.
In the presented communication format, MAK is master acknowledge and NMAK is no
master acknowledge.
Table 14.
SAD+Read/Write patterns
Command
SAD[7:1]
R/W
SAD+R/W
Read
0011001
1
00110011 (33h)
Write
0011001
0
00110010 (32h)
Table 15.
Transfer when master is receiving (reading) multiple bytes of data from slave
Master
ST
SAD
+W
SUB
SR
SAD
+R
MAK
MAK
NMAK
SP
Slave
SAK
SAK
SAK
DATA
DATA
DATA



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