TC7129CLW datasheet(15/28 Pages) MICROCHIP

15 / 28 page

 2002-2012 Microchip Technology Inc.

DS21459E-page 15

TC7129

4.11

Integrator Section

The integrator section includes the integrator, compar-

ator, input buffer amplifier and analog switches (see

Table 4-2) used to change the circuit configuration

during the separate measurement phases described

earlier. (See Figure 4-12).

The buffer amplifier has a common mode input voltage

range from 1.5V above V– to 1V below V+. The integra-

tor amplifier can swing to within 0.3V of the rails.

However, for best linearity, the swing is usually limited

to within 1V. Both amplifiers can supply up to 80

A of

output current, but should be limited to 20

A for good

linearity.

4.12

Continuity Indicator

A comparator with a 200 mV threshold is connected

between IN HI (pin 33) and IN LO (pin 32). Whenever

the voltage between inputs is less than 200 mV, the

CONTINUITY output (pin 27) will be pulled high,

activating the continuity annunciator on the display.

The continuity pin can also be used as an input to drive

the continuity annunciator directly from an external

source (see Figure 4-13).

A schematic of the input/output nature of this pin is also

shown in Figure 4-14.

Figure 4-13:

Continuity Indicator Circuit.

Figure 4-14:

Input/Output Pin Schematic.

4.13

Common and Digital Ground

The common and digital ground (DGND) outputs are

generated from internal Zener diodes. The voltage

between V+ and DGND is the internal supply voltage

for the digital section of the TC7129. Common can

source approximately 12

A; DGND has essentially no

source capability (see Figure 4-15).

TABLE 4-2:

SWITCH LEGENDS

Label

Description

Label

Meaning.

Open during all de-integrate phases.

DE–

Closed during all de-integrate phases when

input voltage is negative.

DE+

Closed during all de-integrate phases when

input voltage is positive.

INT1

Closed during the first integrate phase

(measurement of the input voltage).

INT2

Closed during the second integrate phase

(measurement of the amplifier offset).

INT

Open during both integrate phases.

REST

Closed during the rest phase.

Closed during the zero integrate phase.

X10

Closed during the X10 phase.

X10

Open during the X10 phase.

COM

Buffer

200 mV

IN HI

–

IN LO

–

CONT

500 k

To Display Driver

(Not Latched)

TC7129

500 k

DP4/OR, Pin 20

DP3/UR, Pin 21

LATCH/HOLD Pin 22

CONTINUITY, Pin 27

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