LSM9DS0 datasheet(47/74 Pages) STMICROELECTRONICS

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LSM9DS0

8.13

FIFO_SRC_REG_G (2Fh)

8.14

INT1_CFG_G (30h)

Table 41. FIFO_SRC_REG_G register

WTM

OVRN

EMPTY

FSS4

FSS3

FSS2

FSS1

FSS0

Table 42. FIFO_SRC_REG_G description

WTM

Watermark status. (0: FIFO filling is lower than WTM level; 1: FIFO filling is equal

to or higher than WTM level)

OVRN

Overrun bit status.

(0: FIFO is not completely filled; 1: FIFO is completely filled)

EMPTY

FIFO empty bit.

(0: FIFO not empty; 1: FIFO empty)

FSS4-FSS1

FIFO stored data level

Table 43. INT1_CFG_G register

AND/OR

LIR

ZHIE

ZLIE

YHIE

YLIE

XHIE

XLIE

Table 44. INT1_CFG_G description

AND/OR

AND/OR combination of interrupt events. Default value: 0

(0: OR combination of interrupt events 1: AND combination of interrupt events

LIR

Latch interrupt request. Default value: 0

(0: interrupt request not latched; 1: interrupt request latched)

Cleared by reading INT1_SRC reg.

ZHIE

Enable interrupt generation on Z high event. Default value: 0

(0: disable interrupt request; 1: enable interrupt request on measured value higher

than preset threshold)

ZLIE

Enable interrupt generation on Z low event. Default value: 0

(0: disable interrupt request; 1: enable interrupt request on measured value lower

than preset threshold)

YHIE

Enable interrupt generation on Y high event. Default value: 0

(0: disable interrupt request; 1: enable interrupt request on measured value higher

than preset threshold)

YLIE

Enable interrupt generation on Y low event. Default value: 0

(0: disable interrupt request; 1: enable interrupt request on measured value lower

than preset threshold)

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