AD5290YRMZ100-R7 datasheet(7/20 Pages) AD

No. de pieza	AD5290YRMZ100-R7

Descripción Electrónicos	Compact 30 V / 15,-15 V 256-Position Digital Potentiometer

PDF	20 Pages

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Fabricante Electrónico	AD [Analog Devices]

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7 / 20 page

Data Sheet

AD5290

Rev. C | Page 7 of 20

INTERFACE TIMING CHARACTERISTICS

Table 3.

Parameter 1, 2

Symbol

Conditions

Min

Typ

Max

Unit

Clock Frequency

fCLK

MHz

Input Clock Pulse Width

tCH, tCL

Clock level high or low

120

Data Setup Time

tDS

Data Hold Time

tDH

CLK to SDO Propagation Delay3

tPD

RPull-up = 2.2 kΩ, CL < 20 pF

100

CS Setup Time

tCSS

120

CS High Pulse Width

tCSW

150

CLK Fall to CS Fall Hold Time

tCSH0

CLK Rise to CS Rise Hold Time

tCSH

120

CS Rise to Clock Rise Setup

tCS1

120

See Figure 3 for the location of the measured values. All input control voltages are specified with tR = tF = 1 ns (10% to 90% of VDD) and timed from a voltage level of

1.6 V. Switching characteristics are measured using VDD = +15 V and VSS = −15 V.

Guaranteed by design and not subject to production test.

Propagation delay depends on the value of VDD, RPull-up, and CL.

AD5290YRMZ100-R7 Datasheet(PDF) 7 Page - Analog Devices

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