REV. B

AD7724

–10–

CIRCUIT DESCRIPTION

The AD7724 employs a sigma-delta conversion technique to

convert the analog input into a digital pulse train. The analog

input is continuously sampled by a switched capacitor modulator

digital data that represents the analog input is in the ones’ den-

sity of the bit stream at the output of the sigma-delta modulator.

Due to the high oversampling rate, which spreads the quantiza-

band of interest is reduced (Figure 5a). To reduce the quantiza-

tion noise further, a high order modulator is employed to shape

the noise spectrum, so that most of the noise energy is shifted

out of the band of interest (Figure 5b).

BAND OF INTEREST

BAND OF INTEREST

a.

b.

QUANTIZATION NOISE

NOISE SHAPING

Figure 5. Sigma-Delta ADC

USING THE AD7724

ADC Differential Inputs

The AD7724 uses differential inputs to provide common-mode

noise rejection (i.e., the converted result will correspond to the

differential voltage between the two inputs). The absolute volt-

age on both inputs must lie between AGND and AVDD.

In the unipolar mode, the full scale-input range (VIN(+) –

full-scale analog input range is

±V

allows complementary input signals. Alternatively, VIN(–) can

be connected to a dc bias voltage to allow a single-ended input

± V

Differential Inputs

The analog input to the modulator is a switched capacitor design.

The analog input is converted into charge by highly linear sam-

pling capacitors. A simplified equivalent circuit diagram of the

analog input is shown in Figure 6. A signal source driving the

analog input must be able to provide the charge onto the sam-

pling capacitors every half MCLK cycle and settle to the required

accuracy within the next half cycle.

A

B

A

B

2pF

2pF

AC

GROUND

500

A

B

A

B

MCLK

VIN(+)

VIN(–)

500

Figure 6. Analog Input Equivalent Circuit

Since the AD7724 samples the differential voltage across its

analog inputs, low noise performance is attained with an input

circuit that provides low differential mode noise at each input.

The amplifiers used to drive the analog inputs play a critical role

in attaining the high performance available from the AD7724.

When a capacitive load is switched onto the output of an op

amp, the amplitude will momentarily drop. The op amp will try

to correct the situation and, in the process, hits its slew rate

limit. This nonlinear response, which can cause excessive ring-

ing, can lead to distortion. To remedy the situation, a low-pass

RC filter can be connected between the amplifier and the input

to the AD7724 as shown in Figure 7. The external capacitor at

each input aids in supplying the current spikes created during

the sampling process. The resistor in the diagram, as well as

creating a pole for the antialiasing, isolates the op amp from the

transient nature of the load.

ANALOG

INPUT

R

C

VIN(+)

VIN(–)

R

C

Figure 7. Simple RC Antialiasing Circuit

The differential input impedance of the AD7724 switched capaci-

tor input varies as a function of the MCLK frequency, given by

the equation:

Zf

k

IN

MCLK

=

()

10

8

Ω

Even though the voltage on the input sampling capacitors may

not have enough time to settle to the accuracy indicated by the

resolution of the AD7724, as long as the sampling capacitor charg-

ing follows the exponential curve of RC circuits, only the gain

accuracy suffers if the input capacitor is switched away too early.