SERIAL PROGRAMMING INTERFACE CHARACTERISTICS

A3

ADDRESS

SDATA

MSB

DATA

A2

A1

A0

D11

D10

D9

D0

16 x M

MSB

LSB

LSB

MSB

SCLK

SEN

SDATA

ADS5520

The ADS5520 has a three-wire serial interface. The ADS5520 latches serial data SDATA on the falling edge of

serial clock SCLK when SEN is active.

• Serial shift of bits is enabled when SEN is low. SCLK shifts serial data at the falling edge.

• Minimum width of data stream for a valid loading is 16 clocks.

• Data is loaded at every 16th SCLK falling edge while SEN is low.

• In case the word length exceeds a multiple of 16 bits, the excess bits are ignored.

• Data can be loaded in multiples of 16-bit words within a single active SEN pulse.

• The first 4-bit nibble is the address of the register while the last 12 bits are the register contents.

Figure 3. DATA Communication is 2-Byte, MSB First

Figure 4. Serial Programming Interface Timing Diagram

Table 2. Serial Programming Interface Timing Characteristics

SYMBOL

PARAMETER

UNIT

SCLK period

50

ns

SCLK duty cycle

25%

50%

75%

SEN to SCLK setup time

8

ns

SCLK to SEN hold time

6

ns

Data setup time

8

ns

Data hold time

6

ns

(1)

Typ, min, and max values are characterized, but not production tested.

Copyright © 2004–2008, Texas Instruments Incorporated

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