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ADE7978 Datasheet(PDF) 101 Page - Analog Devices |
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ADE7978 Datasheet(HTML) 101 Page - Analog Devices |
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101 / 120 page ![]() Data Sheet ADE7978/ADE7933/ADE7932 Rev. 0 | Page 101 of 120 Table 38. Internal DSP Memory RAM Registers Address Register Name R/W1 Bit Length Type2 Default Value Description 0xE203 Reserved R/W 16 U 0x0000 This address should not be written for proper operation. 0xE228 Run R/W 16 U 0x0000 The run register starts and stops the DSP (see the Digital Signal Processor section). 1 R/W = read and write. 2 U = unsigned register. Table 39. Billable Registers Address Register Name R/W1 Bit Length Type2 Default Value Description 0xE400 AWATTHR R 32 S 0x00000000 Phase A total active energy accumulation. 0xE401 BWATTHR R 32 S 0x00000000 Phase B total active energy accumulation. 0xE402 CWATTHR R 32 S 0x00000000 Phase C total active energy accumulation. 0xE403 AFWATTHR R 32 S 0x00000000 Phase A fundamental active energy accumulation. 0xE404 BFWATTHR R 32 S 0x00000000 Phase B fundamental active energy accumulation. 0xE405 CFWATTHR R 32 S 0x00000000 Phase C fundamental active energy accumulation. 0xE406 AVARHR R 32 S 0x00000000 Phase A total reactive energy accumulation. 0xE407 BVARHR R 32 S 0x00000000 Phase B total reactive energy accumulation. 0xE408 CVARHR R 32 S 0x00000000 Phase C total reactive energy accumulation. 0xE409 AFVARHR R 32 S 0x00000000 Phase A fundamental reactive energy accumulation. 0xE40A BFVARHR R 32 S 0x00000000 Phase B fundamental reactive energy accumulation. 0xE40B CFVARHR R 32 S 0x00000000 Phase C fundamental reactive energy accumulation. 0xE40C AVAHR R 32 S 0x00000000 Phase A apparent energy accumulation. 0xE40D BVAHR R 32 S 0x00000000 Phase B apparent energy accumulation. 0xE40E CVAHR R 32 S 0x00000000 Phase C apparent energy accumulation. 1 R = read only. 2 S = signed register in twos complement format. |
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