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MP2115DQ Datasheet(PDF) 10 Page - Monolithic Power Systems

No. de pieza MP2115DQ
Descripción Electrónicos  2A Synchronous Step-Down Converter with Programmable Input Current Limit
PDF  11 Pages
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Fabricante Electrónico  MPS [Monolithic Power Systems]
Página de inicio  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP2115DQ Datasheet(HTML) 10 Page - Monolithic Power Systems

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MP2115 – 2A, 6V SYNCHRONOUS STEP-DOWN CONVERTER
MP2115 Rev. 1.0
www.MonolithicPower.com
10
2/28/2011
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
Input Capacitor Selection
The input capacitor (C1) reduces the surge
current drawn from the input and switching
noise from the device. The input capacitor
impedance at the switching frequency must be
less than input source impedance to prevent
high frequency switching current passing to the
input. Ceramic capacitors with X5R or X7R
dielectrics are highly recommended because of
their
low
ESR
and
small
temperature
coefficients. For most applications, a 10µF
capacitor is sufficient.
VSYS Capacitor Selection
The VSYS capacitor C2 is used to supply the
USB port and with the peak output current,
such as during the TDM frame. That output
peak current is about 2A. Use three 470µF
capacitors to avoid large voltage drops.
Output Capacitor Selection
The output capacitor (C4) keeps output voltage
ripple small and ensures regulation loop stable.
The output capacitor impedance should remain
low at the switching frequency. Ceramic
capacitors with X5R or X7R dielectrics are
recommended. The output ripple ∆VOUT is
approximately:
(
)
⎟⎟
⎜⎜
×
×
+
×
×
×
×
2
C
f
8
1
ESR
L
f
V
V
V
V
V
OSC
OSC
IN
OUT
IN
OUT
OUT



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