STM32F373VC datasheet(84/131 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32F37xxx

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DocID022691 Rev 4

6.3.14

I/O port characteristics

General input/output characteristics

Unless otherwise specified, the parameters given in Table 52 are derived from tests

performed under the conditions summarized in Table 22. All I/Os are CMOS and TTL

compliant.

Table 52. I/O static characteristics (1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL

Low level input

voltage

TC and TTa I/O

0.3VDD+0.07(2)

FT and FTf I/O

0.475VDD–0.2(2)

BOOT0

0.3VDD–0.3(2)

All I/Os except BOOT0 pin

0.3VDD

VIH

High level input

voltage

TC and TTa I/O

0.445VDD+0.398(2)

FT and FTf I/O

0.5VDD+0.2(2)

BOOT0

0.2VDD+0.95(2)

All I/Os except BOOT0 pin

0.7VDD

Vhys

Schmitt trigger

hysteresis

TC and TTa I/O

200(2)

FT and FTf I/O

100(2)

BOOT0

300(2)

Ilkg

Input leakage

current (3)

TC, FT and FTf I/O

TTa in digital mode

VSS < VIN < VDD

±0.1

µA

TTa in digital mode

VDD ≤ VIN ≤ VDDA

TTa in analog mode

VSS ≤ VIN ≤ VDDA

±0.2

FT and FTf I/O (3)

VDD ≤ VIN ≤ 5 V

RPU

Weak pull-up

equivalent

resistor(4)

VIN = VSS

RPD

Weak pull-down

equivalent

resistor(4)

VIN = VDD

CIO

I/O pin capacitance

1. VDDSD12 is the external power supply for the PB2, PB10, and PE7 to PE15 I/O pins (the I/O pin ground is internally

connected to VSS). VDDSD3 is the external power supply for PB14 to PB15 and PD8 to PD15 I/O pins (the I/O pin ground

is internally connected to VSS). For those pins all VDD supply references in this table are related to their given VDDSDx

power supply.

2. Data based on design simulation only. Not tested in production.

3. Leakage could be higher than maximum value, if negative current is injected on adjacent pins.

4. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This

PMOS/NMOS contribution to the series resistance is minimal (~10% order).

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