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AM79C960KC Datasheet(PDF) 97 Page - Advanced Micro Devices

No. de pieza AM79C960KC
Descripción Electrónicos  PCnetTM-ISA Single-Chip Ethernet Controller
PDF  127 Pages
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Fabricante Electrónico  AMD [Advanced Micro Devices]
Página de inicio  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C960KC Datasheet(HTML) 97 Page - Advanced Micro Devices

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P R E L I M I N A R Y
AMD
1-439
Am79C960
SWITCHING CHARACTERISTICS: EADI
Parameter
Symbol
Parameter Description
Test Conditions
Min
Max
Unit
tEAD1
SRD Setup to
↑ SRDCLK
40
ns
tEAD2
SRD Hold to
↑ SRDCLK
40
ns
tEAD3
SF/BD Change to
↓ SRDCLK
–15
+15
ns
tEAD4
EAR Deassertion to
↑
SRDCLK (First Rising Edge)
50
ns
tEAD5
EAR Assertion After SFD
Event (Packet Rejection)
0
51,090
ns
tEAD6
EAR Assertion
110
ns
Note:
External Address Detection Interface is invoked by setting bit 3 in ISACSR2 and resetting bit 0 in ISACSR2. External
MAU select is not available when EADISEL bit is set.
SWITCHING CHARACTERISTICS: JTAG (IEEE 1149.1) INTERFACE
Parameter
Symbol
Parameter Description
Test Conditions
Min
Max
Unit
tJTG1
TCK HIGH Assertion
20
ns
tJTG2
TCK Period
50
ns
tJTG3
TDI Setup Before
↑ TCK
5
ns
tJTG4
TDI, TMS Hold After
↑ TCK
5
ns
tJTG5
TMS Setup Before
↑ TCK
8
ns
tJTG6
TDO Active After
↓ TCK
0
30
ns
tJTG7
TDO Change After
↓ TCK
0
30
ns
tJTG8
TDO Tristate After
↓ TCK
0
25
ns
Note:
JTAG logic is reset with an internal Power-On Reset circuit independent of Sleep Modes.



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