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TLC32046MFKB Datasheet(PDF) 40 Page - Texas Instruments

No. de pieza TLC32046MFKB
Descripción Electrónicos  Wide-Band Analog Interface Circuit
PDF  56 Pages
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Fabricante Electrónico  TI [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI - Texas Instruments

TLC32046MFKB Datasheet(HTML) 40 Page - Texas Instruments

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4–2
DATA-DR
DX
DR
FSX, FSR, FSD
td (CH-DR)
tsu (DX)
D15
D14
D13
D12
D2
D1
D0
Don’t Care
D0
D1
D2
D11
D12
D13
D14
D15
D0
D1
D2
D11
D12
D13
D14
D15
8 V
2 V
2 V
8 V
2 V
2 V
8 V
td (CH-FL)
td (CH-FH)
tc (SCLK)
D11
2 V
SHIFT
CLK
Figure 4–2. Dual-Word (Telephone Interface) Mode Timing
DX
DR
FSX, FSR†
td (CH–DR)
tsu (DX)
Don’t Care
D0
D1
D2
D11
D12
D13
D14
D15
D0
D1
D2
D11
D12
D13
D14
D15
8 V
2 V
2 V
8 V
2 V
2 V
8 V
td (CH-FL)
td (CH-FH)
tc (SCLK)
2 V
SHIFT
CLK
8 V
2 V
th (DX)
td (CH-EL)
td (CH-EH)
EODX, EODR‡
Figure 4–3. Word Timing
† The time between falling edges of FSR is the A/D conversion period and the time between falling edges of FSX is the
D/A conversion period.
‡ In the word format, EODX and EODR go low to signal the end of a 16-bit data word to the processor. The word-cycle
is 20 shift-clocks wide, giving a four-clock period setup time between data words.



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