MCP6044-I datasheet(13/34 Pages) MICROCHIP

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DS21669C-page 13

MCP6041/2/3/4

4.2

Rail-to-Rail Output

There are two specifications that describe the output

swing capability of the MCP6041/2/3/4 family of op

amps. The first specification (Maximum Output Voltage

Swing) defines the absolute maximum swing that can

be achieved under the specified load condition. Thus,

the output voltage swings to within 10 mV of either sup-

ply rail with a 50 k

Ω load to V

DD/2. Figure 2-10 shows

how the output voltage is limited when the input goes

beyond the linear region of operation.

The second specification that describes the output

swing capability of these amplifiers is the Linear Output

Voltage Range. This specification defines the maxi-

mum output swing that can be achieved while the

amplifier still operates in its linear region. To verify

linear operation in this range, the large signal DC

Open-Loop Gain (AOL) is measured at points inside the

supply rails. The measurement must meet the specified

AOL condition in the specification table.

4.3

Output Loads and Battery Life

The MCP6041/2/3/4 op amp family has outstanding

quiescent current, which supports battery-powered

applications. There is minimal quiescent current

glitching when Chip Select (CS) is raised or lowered.

This prevents excessive current draw, and reduced

battery life, when the part is turned off or on.

Heavy resistive loads at the output can cause

excessive battery drain. Driving a DC voltage of 2.5V

across a 100 k

Ω load resistor will cause the supply cur-

rent to increase by 25 µA, depleting the battery 43

times as fast as IQ (0.6 µA, typical) alone.

High frequency signals (fast edge rate) across

capacitive loads will also significantly increase supply

current. For instance, a 0.1 µF capacitor at the output

presents an AC impedance of 15.9 k

Ω (1/2πfC) to a

100 Hz sinewave. It can be shown that the average

power drawn from the battery by a 5.0 Vp-p sinewave

(1.77 Vrms), under these conditions, is

EQUATION 4-1:

This will drain the battery 18 times as fast as IQ alone.

4.4

Capacitive Loads

Driving large capacitive loads can cause stability

problems for voltage feedback op amps. As the load

capacitance increases, the feedback loop’s phase

margin decreases and the closed-loop bandwidth is

reduced. This produces gain peaking in the frequency

response, with overshoot and ringing in the step

response. A unity gain buffer (G = +1) is the most

sensitive to capacitive loads, although all gains show

the same general behavior.

When driving large capacitive loads with these op

amps (e.g., > 60 pF when G = +1), a small series

resistor at the output (RISO in Figure 4-3) improves the

feedback loop’s phase margin (stability) by making the

output load resistive at higher frequencies. The

bandwidth will be generally lower than the bandwidth

with no capacitive load.

FIGURE 4-3:

Output Resistor, RISO

stabilizes large capacitive loads.

Figure 4-4 gives recommended RISO values for

different capacitive loads and gains. The x-axis is the

normalized load capacitance (CL/GN), where GN is the

circuit’s noise gain. For non-inverting gains, GN and the

Signal Gain are equal. For inverting gains, GN is

1+|Signal Gain| (e.g., -1 V/V gives GN =+2 V/V).

FIGURE 4-4:

Recommended RISO Values

for Capacitive Loads.

After selecting RISO for your circuit, double check the

resulting

frequency

response

peaking

and

step

response overshoot. Modify RISO’s value until the

response

reasonable.

Bench

evaluation

and

simulations with the MCP6041/2/3/4 SPICE macro

model are helpful.

PSupply = (VDD - VSS) (IQ + VL(p-p) f CL )

= (5V)(0.6 µA + 5.0Vp-p · 100Hz · 0.1µF)

= 3.0 µW + 50 µW

VIN

MCP604X

RISO

VOUT

1,000

10,000

100,000

1.E+01

1.E+02

1.E+03

1.E+04

Normalized Load Capacitance; CL/GN (F)

10p

100k

100p

GN = +1

GN = +2

10k

10n

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