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AS3515 Datasheet(PDF) 44 Page - ams AG |
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AS3515 Datasheet(HTML) 44 Page - ams AG |
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44 / 67 page ![]() AS3515 V15 austriamicrosystems Data Sheet, Confidential www.austriamicrosystems.com Revision 3.1 43 - 66 6.16 Interrupt Generation 6.16.1 General All interrupt sources can get enabled or disabled by corresponding bits in the 3 IRQ-bytes. By default no IRQ source is enabled. The IRQ output can get configured to be PUSH/PULL or OPEN_DRAIN and ACTIVE_HIGH or ACTIVE LOW with 2 bits in IRQ_ENRD2 register (0x27h). Default state is push/pull and active_high. 6.16.2 IRQ Source Interpretation There are 3 different modules to process interrupt sources: LEVEL The IRQ output is kept active as long as the interrupt source is present and this IRQ-Bit is enabled EDGE The IRQ gets active with a high going edge of this source. The IRQ stays active until the corresponding IRQ-Register gets read. STATUS CHANGE The IRQ gets active when the source-state changes. The change bit and the status can be read to notice which interrupt was the source. The IRQ stays active until the corresponding interrupt register gets read. 6.16.3 De-bouncer There is a de-bouncer function implemented for USB and CHARGER. Since these 2 signals can be unstable for the phase of plug-in or unplug, a de-bounce time of 512ms/256ms/128ms/0ms can be selected by 2 bits in the IRQ_ENRD2 register (0x27h). 6.16.4 Register Description First Interrupt Register (25h) Table 44 IRQ_ENRD0 Register Bit Name Int. Type Description 7 CHG_tmphigh Level 1: battery temperature was too high and the charger was turned off 6 CHG_endofch Edge 1: charging is complete, turn charger off After turning off the charger, IRQ will be released. 5 CHG_status 1: charger connected, also valid if charger is connected during wakeup 4 CHG_changed Status change 1: charger status changed, check CHG_status 3 USB_status 1: USB connected, also valid if USB is connected during wakeup 2 USB_changed Status change 1: USB status changed, check UB_status 1 RVDD_waslow Level 1: if RTC supply was low, RTC not longer valid IRQ will be released by any I2C action. 0 BVDD_islow Level 1:BVDD has reached brown out level The register is R/W; default value is 00h By writing to the register the corresponding interrupt is enabled, reading the register delivers the interrupt source. |
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