CS4216 datasheet(13/58 Pages) CIRRUS

13 / 58 page

Sub-frame Bits 17 to 24

RESERVED

ADV

LCL

RCL

ADV

ADC Valid data bit.

0 - Invalid ADC data

1 - Valid ADC data

Indicates ADC has completed initialization

after power-up, low power mode,

or mute.

LCL

Left ADC clipping indicator

0 - Normal

1 - Clipping

RCL

Right ADC clipping indicator

0 - Normal

1 - Clipping

RESERVED bits can be 0 or 1

Sub-frame Bits 25 to 32

ER3

ER2

ER1

ER0

Ver3

Ver2

Ver1

Ver0

ER3-ER0 Error Word

0000 - Normal – No errors.

0001 - Input Sub-frame Bit 21 is set.

Control data will not be loaded

0010 - Sync Pulse is incorrect.

Causes the analog output to mute.

0011 - SCLK is outside the allowable

range. Analog output mutes.

Ver3-Ver0

CS4216 Version Number

0000 = "A" (see Appendix A)

0001 = "B", "C", . . . (This data sheet)

Sub-frame Bits 33 to 48

Right ADC Audio Data, MSB first, 2’s comple-

ment coded.

Sub-frame Bits 1 to 16

Left ADC Audio Data, MSB first, 2’s comple-

ment coded.

OUTPUT DATA BIT DEFINITIONS

ADC - Left Word

30 30

ADC - Right Word

Sub-frame

Word B

Word A

ADC - Left Word

30 30

SM1 and SM2

SM3

ADC - Right Word

Error

Version

0 001 0 000

.XXX X

XX XX

X XXX

Sub-frame

Figure 6. Serial Data Output Format - SM1, SM2, and SM3.

Sub-frame Bits 49 to 60

These bits are reserved, and can be 0 or 1.

Sub-frame Bits 61 to 64

DI1

DI2

DI3

DI4

DI1-DI4

These bits follow the state of the Digital

Input pins. In SM3 DI3 and DI4 are used

and unavailable. In SM4 DI2, DI3, & DI4

are not available as input bits.

CS4216

DS83F2

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