3D7702Z-O2 datasheet(3/5 Pages) DATADELAY

No. de pieza	3D7702Z-O2

Descripción Electrónicos	MONOLITHIC GATED DELAY LINE OSCILLATOR (SERIES 3D7702)

PDF	5 Pages

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Fabricante Electrónico	DATADELAY [Data Delay Devices, Inc.]

Página de inicio	http://www.datadelay.com

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3D7702

APPLICATION NOTES

OPERATIONAL DESCRIPTION

The 3D7702 delay line oscillator architecture is

shown in Figure 1. The internal delay line is

composed of a number of delay cells connected

in series and is compensated for thermal and

supply voltage variations. A low-going edge on

the EN input starts the oscillator, with the O2

output responding immediately. The O1 output is

delayed by ½ cycle. The response of the output

when the oscillator is disabled depends on the

status of O2 when the EN signal goes high, as

shown in Figure 2. If O2 is low, it will remain low,

and the final pulse on O1 will be ½ of the period.

If O2 is high, it will go low as soon as EN goes

high, and the final pulse on both outputs will have

a width smaller than ½ the period.

Temp & Vdd

Compensation

Figure 1: 3D7702 Functional Diagram

Delay Line

VDD

GND

Figure 2: 3D7702 Timing Diagrams

5ns typ

Doc #06024

DATA DELAY DEVICES, INC.

12/5/2006

3 Mt. Prospect Ave. Clifton, NJ 07013

3D7702Z-O2 Datasheet(PDF) 3 Page - Data Delay Devices, Inc.