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L9362013TR Datasheet(PDF) 7 Page - STMicroelectronics |
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L9362013TR Datasheet(HTML) 7 Page - STMicroelectronics |
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7 / 17 page ![]() 7/17 L9362 1.0 Diagnostic Register and SPI timing Figure 1. Impulse diagram to read the Diagnostic Register Note: FR_RESET means Reset failure storage (internal signal) Figure 2. Diagnostic Failure Register Structure FR_RESET SDI LSB D1 D2 D3 D4 D5 99AT0008 D6 MSB D2 SDO CLK NCS LSB FSL D1 D6 D4 D3 D5 MSB 99AT0009/A D5 D7 D6 D1 D3 D4 D2 D0 FSL MSB LSB Failure indicator bit (only valid during NCS = LOW to the first L to H CLK change 1: failure stored 0: no failures Status channel 4 D0 D1 Status 1 1 no failures 1 0 open circuit, channel on 0 1 short to battery or overtemperature 0 0 short to gnd, channel off Status channel 3 D2 D3 corresponding to D0 D1 Status channel 2 D4 D5 corresponding to D0 D1 Status channel 1 D6 D7 corresponding to D0 D1 |
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