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HT24LC02 Datasheet(PDF) 3 Page - Holtek Semiconductor Inc |
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HT24LC02 Datasheet(HTML) 3 Page - Holtek Semiconductor Inc |
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3 / 8 page ![]() A.C. Characteristics Ta=0 °C to 70°C Symbol Parameter Remark Standard Mode* VCC=5V ±10% Unit Min. Max. Min. Max. fSK Clock Frequency — 100 — 400 kHz tHIGH Clock High Time 4000 — 600 — ns tLOW Clock Low Time 4700 — 1200 — ns tR SDA and SCL Rise Time Note — 1000 — 300 ns tF SDA and SCL Fall Time Note — 300 — 300 ns tHD:STA START Condition Hold Time After this period the first clock pulse is generated 4000 — 600 — ns tSU:STA START Condition Setup Time Only relevant for repeated START condition 4000 — 600 — ns tHD:DAT Data Input Hold Time 0 — 0 — ns tSU:DAT Data Input Setup Time 200 — 100 — ns tSU:STO STOP Condition Setup Time 4000 — 600 — ns tAA Output Valid from Clock — 3500 — 900 ns tBUF Bus Free Time Time in which the bus must be free before a new transmission can start 4700 — 1200 — ns tSP Input Filter Time Constant (SDA and SCL Pins) Noise suppression time —100 — 50 ns tWR Write Cycle Time — 5 — 5 ms Notes: These parameters are periodically sampled but not 100% tested * The standard mode means VCC=2.4V to 5.5V For relative timing, refer to timing diagrams HT24LC01/02 3 6th May ’99 |
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