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HT48CA3 Datasheet(PDF) 2 Page - Holtek Semiconductor Inc |
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HT48CA3 Datasheet(HTML) 2 Page - Holtek Semiconductor Inc |
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2 / 36 page ![]() Pin Assignment Pin Description Pin Name I/O ROM Code Option Description RES I ¾ Schmitt trigger reset input, active low. PA0~PA7 I/O Wake-up* Pull-high*** Bidirectional 8-bit input/output port. Each bit can be configured as a wake-up input by a mask option. Software instructions determine the CMOS output or Schmitt trigger input with/without pull-high resistor. The pull-high resistor of each input/output line is also optional. PB0/PFD PB1~PB7 I/O Pull-high** PB0 or PFD Bidirectional 8-bit input/output port. Software instructions determine the CMOS output or Schmitt trigger input with/without pull-high resis- tor. The pull-high resistor of each input/output line is also optional. The output mode of PB0 can be used as an internal PFD signal output and it can be used as a various frequency carrier signal. VSS ¾¾ Negative power supply, ground PC0/TMR0 PC1~PC4 PC5/TMR1 I/O Pull-high* Bidirectional 6-bit input/output port. Software instructions determine the CMOS output or Schmitt trigger input with/without pull-high resis- tor. The pull-high resistor of each input/output line is also optional. PC0 and PC5 are pin shared with TMR0 and TMR1 function pins. PF0/INT I/O Pull-high* Bidirectional 1-bit input/output port. Software instructions determine the CMOS output or Schmitt trigger input with/without pull-high resis- tor. The pull-high resistor of this input/output line is also optional. PF0 is pin shared with the INT function pin. VDD ¾¾ Positive power supply OSC1 OSC2 I O Crystal or RC OSC1, OSC2 are connected to an RC network or Crystal (determined by hardware option) for the internal system clock. In the case of RC op- eration, OSC2 is the output terminal for 1/4 system clock. Note: * Bit option ** Nibble option *** Byte option HT48CA3 Rev. 1.40 2 July 16, 2003 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 1 9 1 8 1 7 1 6 1 5 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 P B 6 P B 7 P A 4 P A 5 P A 6 P A 7 O S C 2 O S C 1 V D D R E S P C 5 / T M R 1 P C 4 P C 3 P C 2 P B 5 P B 4 P A 3 P A 2 P A 1 P A 0 P B 3 P B 2 P B 1 P B 0 / P F D V S S P F 0 / I N T P C 0 / T M R 0 P C 1 H T 4 8 C A 3 2 8 S K D I P - A / S O P - A |
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