ICS574

Zero Delay, Low Skew Buffer

MDS 574 B

3

Revision 051801

Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126 • (408)295-9800 • www.icst.com

Parameter

Conditions

Minimum

Typical

Maximum Units

ABSOLUTE MAXIMUM RATINGS (note 1)

ABSOLUTE MAXIMUM RATINGS (note 1)

Supply voltage, VDD

Referenced to GND

-0.5

7

V

Inputs and Clock Outputs

Referenced to GND

-0.5

VDD+0.5

V

Electrostatic Discharge

MIL-STD-883

2000

V

Ambient Operating Temperature

0

70

°C

Soldering Temperature

Max of 10 seconds

260

°C

Junction temperature

150

°C

Storage temperature

-65

150

°C

DC CHARACTERISTICS (VDD = 3.3 V unless specified otherwise)

DC CHARACTERISTICS (VDD = 3.3 V unless specified otherwise)

DC CHARACTERISTICS (VDD = 3.3 V unless specified otherwise)

Operating Voltage, VDD

3.00

5.50

V

Input High Voltage, VIH

VDD/2+1

V

Input Low Voltage, VIL

VDD/2-1

V

Output High Voltage, VOH

IOH=-18 mA

2.4

V

Output Low Voltage, VOL

IOL=18 mA

0.4

V

Output High Voltage, VOH, CMOS level

IOH=-5 mA

VDD-0.4

V

Operating Supply Current, IDD (Note 2)

No Load

36

mA

Short Circuit Current

Each output

±65

mA

Input Capacitance

7

pF

AC CHARACTERISTICS (VDD = 3.3 V unless specified otherwise)

AC CHARACTERISTICS (VDD = 3.3 V unless specified otherwise)

AC CHARACTERISTICS (VDD = 3.3 V unless specified otherwise)

Input Clock Frequency

FBIN to CLK1

20

160

MHz

Output Clock Frequency

FBIN to CLK1

20

160

MHz

Output Clock Rise Time, CL=30pF

0.8 to 2.0V

1.5

ns

Output Clock Fall Time, CL=30pF

2.0 to 0.8V

1.5

ns

Output Clock Duty Cycle, VDD=3.3V

At 1.4V

40

50

60

%

Device to Device Skew, equally loaded

rising edges at VDD/2

700

ps

Output to Output Skew, equally loaded

rising edges at VDD/2

150

ps

Maximum Absolute Jitter

150

ps

Cycle to Cycle Jitter, 30pF loads

66.67 MHz outputs

250

ps

Electrical Specifications

Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the

device. Prolonged exposure to levels above the operating limits but below the Absolute Maximums may

affect device reliability.

2. With CLKIN = 160 MHz, FBIN to CLK4

Using Spread Spectrum Input Clocks

The ICS574 uses ICS’ Spread Smart technology, allowing it to accurately track (pass through) any clocks that

implement spread spectrum techniques.