21

8.

CPU ACCESS EXAMPLES

Examples of access procedure are shown below. In serial or 4-bit parallel interface mode, the Chip Address

Register (CAR) is not transmitted when the CAR is invalid (CAE = L, see page 13).

8.1

Initialize and Data Write

Parameter

STB

Command/data

Description

b7 b6 b5 b4 b3 b2 b1 b0

Start

H

XX

XXXXXX

(Power-on reset is released 200

µs after power

supply is started)

Chip Address

Register (CAR)

L

0

0

000000

Chip address = 000

Duty setting

L

0

0

011000

1/34 duty

H

X

X

XXXXXX

CAR

L

00

000000

Chip address = 000

D/A converter setting

L

1

0

010000

D/A converter output = 10000H

H

X

X

XXXXXX

CAR

L

00

000000

Chip address = 000

Address register 1

L

11

000000

Dot address, Y address = 00H

Address register 2

L

00

000000

X address = 00H

H

X

X

XXXXXX

CAR

L

00

000000

Chip address = 000

Data R/W mode

L

1

0

110001

Data write, the address is incremented starting from

the current one.

Dot display data 1

|

Dot display data 128

L

|

L

D

D

D

D

D

D

D

D

D

D

D

D

D

D

D

D











Data of Y address = 00H (128 bytes)

Dot display data 1

|

Dot display data 128

L

|

L

D

D

D

D

D

D

D

D

D

D

D

D

D

D

D

D











Data of Y address = 01H (128 bytes)

Dot display data 1

|

Dot display data 128

L

|

L

D

D

D

D

D

D

D

D

D

D

D

D

D

D

D

D











Data of Y address = 02H (128 bytes)

Dot display data 1

|

Dot display data 128

L

|

L

D

D

D

D

D

D

D

D

D

D

D

D

D

D

D

D











Data of Y address = 03H (128 bytes)

H

X

X

XXXXXX

CAR

L

00

000000

Chip address = 000

Address register 1

L

11

010000

Pictograph group address, Y address = 00H

Address register 2

L

00

000000

X address = 00H

H

X

X

XXXXXX

CAR

L

00

000000

Chip address = 000

Remark X = Don't Care, D = Data