| Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
UPD178024GC Datasheet(PDF) 20 Page - NEC |
|
|
|||||||||||||||||||||||||||||
UPD178024GC Datasheet(HTML) 20 Page - NEC |
|
20 / 56 page ![]() 20 µPD178023, 178024 Data Sheet U14126EJ1V0DS00 3.2 Clock Generation Circuit The instruction execution time can be changed as follows: • 0.45 µs/0.89 µs/1.78 µs/3.56 µs/7.11 µs (system clock: 4.5-MHz crystal resonator)Note Figure 3-1. Block Diagram of Clock Generation Circuit 3.3 Timers Four timer channels are provided. • Basic timer : 1 channel • 8-bit timer/event counter : 2 channels • Watchdog timer : 1 channel Figure 3-2. Block Diagram of Basic Timer System clock oscillator X2 X1 STOP 00 00 PCC2 PCC1 Internal bus Standby control circuit 2 fX 2 2 fX 2 3 fX 2 4 fX Prescaler Clock to other than peripheral hardware Prescaler fX CPU clock (fCPU) Wait control circuit Processor clock control register (PCC) PCC0 3 0 Divider circuit 4.5 MHz INTBTM0 |
|
Enlace URL |
| ¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Enlace a la hoja de datos | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |