LT1721 datasheet(15/28 Pages) LINER

15 / 28 page

LT1720/LT1721

APPLICATIONS INFORMATION

56% low duty cycle, sufﬁcient to allow 2ns between the

high pulses. Figure 10 shows the two outputs.

The optional A1 feedback network shown can be used to

force identical output duty cycles. The steady state duty

cycles of both outputs will be 44%. Note, though, that the

addition of this network only adjusts the percentage of

time each output is high to be the same, which can be

important in switching circuits requiring identical settling

times. It cannot adjust the relative phases between the two

outputs to be exactly 180° apart, because the signal at the

input node driven by the crystal is not a pure sinusoid.

SUPPLY VOLTAGE (V)

2.5

4.5

6.0

1000

800

600

400

200

1720/21 F08

3.5

5.5

3.0

4.0

5.0

Figure 8. Timing Skew of Figure 7’s Circuit

–

1/2 LT1720

LT1636

VCC

2.7V TO 6V

620

Ω

220

Ω

10MHz

CRYSTAL (AT-CUT)

100k

2.2k

1.3k

1720/21 F09

0.1

µF

0.1

µF

0.1

µF

OUTPUT 0

OUTPUT 1

GROUND

CASE

OPTIONAL—

SEE TEXT

Figure 9. Crystal-Based Nonoverlapping 10MHz Clock Generator

20ns/DIV

2V/DIV

Figure 10. Nonoverlapping Outputs of Figure 9's Circuit

applications. This circuit works well because of the two

matched delays and rail-to-rail style outputs of the LT1720.

The circuit in Figure 9 shows a crystal oscillator circuit that

generates two nonoverlapping clocks by making full use of

the two independent comparators of the LT1720.

C1 oscillates as before, but with a lower reference level,

C2’s output will toggle at different times. The resistors set

the degree of separation between the output’s high pulses.

With the values shown, each output has a 44% high and

LT1721 Datasheet(PDF) 15 Page - Linear Technology

LT1721 Datasheet(HTML) 15 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

Datasheet Descarga

Enlace URL