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LTC1657IGN Datasheet(PDF) 7 Page - Linear Technology

No. de pieza LTC1657IGN
Descripción Electrónicos  Parallel 16-Bit Rail-to-Rail Micropower DAC
PDF  12 Pages
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Fabricante Electrónico  LINER [Linear Technology]
Página de inicio  http://www.linear.com
Logo LINER - Linear Technology

LTC1657IGN Datasheet(HTML) 7 Page - Linear Technology

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LTC1657
Figure 1. Effect of Negative Offset
Zero-Scale Error (ZSE): The output voltage when the
DAC is loaded with all zeros. Since this is a single supply
part, this value cannot be less than 0V.
Integral Nonlinearity (INL): End-point INL is the maxi-
mum deviation from a straight line passing through the
end points of the DAC transfer curve. Because the part
operates from a single supply and the output cannot go
below zero, the linearity is measured between full scale
and the code corresponding to the maximum offset
specification. The INL error at a given input code is
calculated as follows:
INL (In LSBs) = [VOUT – VOS – (VFS – VOS)
(code/65535)]
VOUT = The output voltage of the DAC measured at
the given input code
Differential Nonlinearity (DNL): DNL is the difference
between the measured change and the ideal one LSB
change between any two adjacent codes. The DNL error
between any two codes is calculated as follows:
DNL = (
∆VOUT – LSB)/LSB
∆VOUT = The measured voltage difference between
two adjacent codes
Digital Feedthrough: The glitch that appears at the analog
output caused by AC coupling from the digital inputs when
they change state. The area of the glitch is specified in
nV • s.
Resolution (n): Resolution is defined as the number of
digital input bits (n). It defines the number of DAC output
states (2n) that divide the full-scale range. Resolution does
not imply linearity.
Full-Scale Voltage (VFS): This is the output of the DAC
when all bits are set to 1.
Voltage Offset Error (VOS): Normally, the DAC offset is the
voltage at the output when the DAC is loaded with all zeros.
The DAC can have a true negative offset, but because the
part is operated from a single supply, the output cannot go
below zero. If the offset is negative, the output will remain
near 0V resulting in the transfer curve shown in Figure 1.
DEFI ITIO S
DAC CODE
1657 F01
OUTPUT
VOLTAGE
NEGATIVE
OFFSET
0V
The offset of the part is measured at the code that corre-
sponds to the maximum offset specification:
VOS = VOUT – [(Code)(VFS)/(2n – 1)]
Least Significant Bit (LSB): One LSB is the ideal voltage
difference between two successive codes.
LSB = (VFS – VOS)/(2n – 1) = (VFS – VOS)/65535
Nominal LSBs:
LTC1657 LSB = 4.096V/65535 = 62.5
µV
DAC Transfer Characteristic:
VG
REFHI REFLO
CODE
REFLO
OUT =

()
+
65536
G = 1 for X1/X2 connected to VOUT
G = 2 for X1/X2 connected to GND
CODE = Decimal equivalent of digital input
(0
≤ CODE ≤ 65535)



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