Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Mexican  ▼
ALLDATASHEET.COM.MX

X  

LTC1686CS8 Datasheet(PDF) 6 Page - Linear Technology

No. de pieza LTC1686CS8
Descripción Electrónicos  52Mbps Precision Delay RS485 Fail-Safe Transceivers
PDF  12 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  LINER [Linear Technology]
Página de inicio  http://www.linear.com
Logo LINER - Linear Technology

LTC1686CS8 Datasheet(HTML) 6 Page - Linear Technology

Back Button LTC1686CS8 Datasheet HTML 2Page - Linear Technology LTC1686CS8 Datasheet HTML 3Page - Linear Technology LTC1686CS8 Datasheet HTML 4Page - Linear Technology LTC1686CS8 Datasheet HTML 5Page - Linear Technology LTC1686CS8 Datasheet HTML 6Page - Linear Technology LTC1686CS8 Datasheet HTML 7Page - Linear Technology LTC1686CS8 Datasheet HTML 8Page - Linear Technology LTC1686CS8 Datasheet HTML 9Page - Linear Technology LTC1686CS8 Datasheet HTML 10Page - Linear Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 12 page
background image
6
LTC1686/LTC1687
DE (Pin 4): Driver Enable. DE = high enables the driver.
DE = low will force the driver output into a high impedance
state. Do not float.
D (Pin 5): Driver Input. Controls the states of the Y and Z
outputs when DE = high. Do not float.
GND (Pins 6, 7): Ground.
Y (Pin 9): Noninverting Driver Output.
PIN FUNCTIONS
Z (Pin 10): Inverting Driver Output.
B (Pin 11): Inverting Receiver Input.
A (Pin 12): Noninverting Receiver Input.
VDD (Pin 14): Positive Supply, 5V to ±5%. Bypass with
0.1
µF ceramic capacitor.
Receiving
INPUTS
OUTPUT
RE
DE
A – B
R
0X
≥ 300mV
1
0X
≤ –300mV
0
0
X
Inputs Open
1
0
X
Inputs Shorted Together
1
A = B = – 7V to 12V
1
X
X
Hi- Z
FU CTIO TABLES
Transmitting
INPUTS
LINE
OUTPUTS
RE
DE
D
CONDITION
Z
Y
X
1
1
No Fault
0
1
X
1
0
No Fault
1
0
X
0
X
X
Hi- Z
Hi- Z
X
1
X
Fault
±10mA Current
Source
(LTC1687)
TEST CIRCUITS
VOD
Y
Z
R
R
VOC
1686/87 • F01
Figure 1. Driver DC Test Load
RECEIVER
OUTPUT
CL
15pF
1k
S1
S2
TEST POINT
VDD
1k
1686/87 F02
Figure 2. Driver DC Test Load
OUTPUT
UNDER TEST
CL
S1
S2
VDD
500
1686/87 F04
Figure 3. Driver/Receiver Timing Test Circuit
Figure 4. Driver Timing Test Load #2
3V
DE
Y
Z
D
RDIFF
CL1
CL2
R
15pF
A
B
RE
1686/87 F03



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12


Datasheet Descarga

Go To PDF Page


Enlace URL



¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Enlace a la hoja de datos    |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com