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P4C1981 Datasheet(PDF) 3 Page - Pyramid Semiconductor Corporation |
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P4C1981 Datasheet(HTML) 3 Page - Pyramid Semiconductor Corporation |
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3 / 13 page ![]() P4C1981/1981L, P4C1982/1982L Page 3 of 13 Document # SRAM114 REV B DATA RETENTION CHARACTERISTICS (P4C1981L/P4C1982L Military Temperature Only) Typ.* Max Symbol Parameter Test Condition Min V CC=VCC= Unit 2.0V 3.0V 2.0V 3.0V V DR V CC for Data Retention 2.0 V I CCDR Data Retention Current 10 15 600 900 µA t CDR Chip Deselect to CE 1 or CE2 ≥ VCC – 0.2V, 0 ns Data Retention Time V IN ≥ VCC – 0.2V or t R † Operation Recovery Time t RC § ns *T A = +25°C §t RC = Read Cycle Time †This parameter is guaranteed but not tested. Notes: 1. Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to MAXIMUM ratingconditions for extended periods may affect reliability. 2. Extended temperature operation guaranteed with 400 linear feet per minute of air flow. 3. Transient inputs with V IL and IIL not more negative than –3.0V and –100mA, respectively, are permissible for pulse widths up to 20 ns. 4. This parameter is sampled and not 100% tested. *V CC = 5.5V. Tested with outputs open. f = Max. Switching inputs are 0V and 3V. CE 1 = VIL, CE2 = VIL, OE = VIH I CC Symbol Parameter Temperature Range Dynamic Operating Current* Commercial Industrial Military –10 N/A –12 –15 –20 –25 –35 –45 Unit N/A mA mA mA POWER DISSIPATION CHARACTERISTICS VS. SPEED N/A 150 155 160 170 180 N/A 170 160 155 150 145 180 170 160 155 150 N/A N/A V IN ≤ 0.2V DATA RETENTION WAVEFORM |
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