+5V, Serial-Input, Voltage-Output, 16-Bit DACs

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9

Applications Information

Reference and Analog Ground Inputs

The MAX541/MAX542 operate with external voltage ref-

erences from 2V to 3V, and maintain 16-bit performance

if certain guidelines are followed when selecting and

applying the reference. Ideally, the reference’s

temperature coefficient should be less than

0.4ppm/°C to maintain 16-bit accuracy to within 1LSB

over the 0°C to +70°C commercial temperature range.

Since this converter is designed as an inverted R-2R

voltage-mode DAC, the input resistance seen by the volt-

age reference is code-dependent. The worst-case input-

resistance variation is from 11.5k

Ω (at code 8555 hex) to

200k

Ω (at code 0000 hex). The maximum change in load

current for a 2.5V reference is 2.5V / 11.5k

Ω = 217µA;

therefore, the required load regulation is 7ppm/mA for a

maximum error of 0.1LSB. This implies a reference

output impedance of less than 18m

Ω. In addition, the

impedance of the signal path from the voltage

reference to the reference input must be kept low

because it contributes directly to the load-regulation

error.

The requirement for a low-impedance voltage reference

is met with capacitor bypassing at the reference inputs

and ground. A 0.1µF ceramic capacitor with short leads

between REFF and AGNDF (MAX542), or REF and

AGND (MAX541), provides high-frequency bypassing.

A surface-mount ceramic chip capacitor is preferred

because it has the lowest inductance. An additional

10µF between REFF and AGNDF (MAX542), or REF

and AGND (MAX541), provides low-frequency bypass-

ing. A low-ESR tantalum, film, or organic semiconductor

capacitor works well. Leaded capacitors are accept-

able because impedance is not as critical at lower fre-

quencies. The circuit can benefit from even larger

bypassing capacitors, depending on the stability of the

external reference with capacitive loading. If separate

force and sense lines are not used, tie the appropriate

force and sense pins together close to the package.

AGND must also be low impedance, as load-regulation

errors will be introduced by excessive AGND resis-

tance. As in all high-resolution, high-accuracy applica-

tions, separate analog and digital ground planes yield

the best results. Tie DGND to AGND at the AGND pin to

form the “star” ground for the DAC system. Always refer

remote DAC loads to this system ground for the best

possible performance.

Unbuffered Operation

Unbuffered operation reduces power consumption as

well as offset error contributed by the external output

buffer. The R-2R DAC output is available directly at

without degradation at zero scale. The DAC’s output

impedance is also low enough to drive medium loads

Ω) without degradation of INL or DNL; only

the gain error is increased by externally loading the

DAC output.

External Output Buffer Amplifier

The requirements on the external output buffer amplifier

change whether the DAC is used in the unipolar or

bipolar mode of operation. In unipolar mode, the output

amplifier is used in a voltage-follower connection. In

bipolar mode (MAX542 only), the amplifier operates

with the internal scaling resistors (Figure 2b). In each

mode, the DAC’s output resistance is constant and is

independent of input code; however, the output amplifi-

er’s input impedance should still be as high as possible

to minimize gain errors. The DAC’s output capacitance

is also independent of input code, thus simplifying sta-

bility requirements on the external amplifier.

In bipolar mode, a precision amplifier operating with

dual power supplies (such as the MAX400) provides

precision amplifiers with input common-mode ranges

including AGND are available; however, their output

swings do not normally include the negative rail

(AGND) without significant degradation of performance.

A single-supply op amp, such as the MAX495, is suit-

able if the application does not use codes near zero.

Since the LSBs for a 16-bit DAC are extremely small

external amplifier’s input specification. The input offset

voltage can degrade the zero-scale error and might

require an output offset trim to maintain full accuracy if

the offset voltage is greater than 1/2LSB. Similarly, the

input bias current multiplied by the DAC output resis-

tance (typically 6.25k

Ω) contributes to the zero-scale

error. Temperature effects also must be taken into con-

sideration. Over the 0°C to +70°C commercial tempera-

ture range, the offset voltage temperature coefficient

(referenced to +25°C) must be less than 0.42µV/°C to

add less than 1/2LSB of zero-scale error. The external

amplifier’s input resistance forms a resistive divider with

the DAC output resistance, which results in a gain error.