LM2524D, LM3524D

SNVS766E – JUNE 2009 – REVISED MAY 2013

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Electrical Characteristics

(1) (continued)

Symbol

Parameter

Conditions

LM2524D

LM3524D

Units

Typ

Tested

Design

Typ

Tested

Design

0.5

1

0.5

1.0

Freq. Change with Temp.

5

5

%

Output Amplitude (Pin 3)

3

2.4

3

2.4

(5)

0.5

1.5

0.5

1.5

Sawtooth Peak Voltage

3.4

3.6

3.8

3.8

Sawtooth Valley Voltage

1.1

0.8

0.6

0.6

ERROR-AMP SECTION

Input Offset Voltage

2

8

10

2

10

Input Bias Current

1

8

10

1

10

Input Offset Current

0.5

1.0

1

0.5

1

Compensation Current

65

65

(Sink)

95

95

125

125

Compensation Current

−125

−125

(Source)

−95

−95

−65

−65

Open Loop Gain

80

74

60

80

70

60

VCMR

Common Mode Input

1.5

1.4

1.5

Voltage Range

5.5

5.4

5.5

CMRR

Common Mode Rejection

90

80

90

80

Ratio

Unity Gain Bandwidth

3

2

MHz

Output Voltage Swing

0.5

0.5

5.5

5.5

PSRR

Power Supply Rejection

80

70

80

65

Ratio

COMPARATOR SECTION

Minimum Duty Cycle

Pin 9 = 0.8V,

0

0

0

0

Maximum Duty Cycle

Pin 9 = 3.9V,

49

45

49

45

Maximum Duty Cycle

Pin 9 = 3.9V,

44

35

44

35

Input Threshold

Zero Duty Cycle

1

1

V

(Pin 9)

Input Threshold (Pin 9)

Maximum Duty Cycle

3.5

3.5

V

Input Bias Current

−1

−1

μA

CURRENT LIMIT SECTION

Sense Voltage

180

180

200

200

220

220

Sense Voltage T.C.

0.2

0.2

mV/°C

Common Mode Voltage

−0.7

−0.7

Range

1

1

(5)

OSC amplitude is measured open circuit. Available current is limited to 1 mA so care must be exercised to limit capacitive loading of fast

pulses.

4

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