TLE6262G datasheet(3/38 Pages) INFINEON

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Final Data TLE 6262 G

version: 2.03 date: 2002-03-20

1.3

Pin Definitions and Functions

Pin No.

Symbol

Function

1CANH

CAN-H bus line; HIGH in dominant state

2RTH

Termination input for CANH

3RO

Reset output; open drain output; integrated pull up; active low

4CANL

CAN-L bus line; LOW in dominant state

5RTL

Termination input for CANL

6, 7, 8, 9,

20, 21,

22, 23

GND

Ground; to reduce thermal resistance place cooling areas on

PCB close to this pins.

OUTH1

High side output 1; controlled via PWM input and/or SPI input,

short circuit protected

OUTL1

Low side output 1; SPI controlled, with active zener

OUTL2

Low side output 2; SPI controlled, with active zener

OUTH2

High side output 2; SPI controlled

OUTH3

High side output 3; SPI controlled, in low power mode controlled

by internal autotiming function if selected

Power supply; block to GND directly at the IC with ceramic

capacitor

CSN

SPI interface chip select not; CSN is an active low input; serial

communication is enabled by pulling the CSN terminal low; CSN

input should only be transitioned when CLK is low; CSN has an

internal active pull up and requires CMOS logic level inputs

SPI interface data out; this tristate output transfers diagnosis

data to the control device; the output will remain 3-stated unless

the device is selected by a low on Chip-Select-Not (CSN); see

table 3 for diagnosis protocol

SPI interface data in; receives serial data from the control

device; serial data transmitted to DI is a 16 bit control word with

the Least Significant Bit (LSB) being transferred first: the input

has an active pull down and requires CMOS logic level inputs; DI

will accept data on the falling edge of CLK-signal; see table 2 for

input data protocol

CLK

SPI interface clock input; clocks the shiftregister; CLK has an

internal active pull down and requires CMOS logic level inputs

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