OUTPUT RISE AND FALL TIMES

Output load capacitance can significantly affect output rise

and fall times. The effect of load capacitance, stray or other-

wise, may be reduced by placing the output back-match re-

sistor close to the output pin and by minimizing all intercon-

necting trace lengths.

Figure 13 shows the effect on risetime

of parallel load capacitance across a 150

Ω load.

DS100144-15

FIGURE 12. Resistance Pins 3 to 4 vs Output Voltage

Ω Load

DS100144-16

FIGURE 13. Rise Time vs C

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