Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Mexican  ▼
ALLDATASHEET.COM.MX

X  

Preview PDF HTML

COP8SE Datasheet(PDF) 25 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No. de pieza COP8SE
Descripción Electrónicos  8-Bit CMOS ROM Based and OTP Microcontrollers with 4k Memory and 128 Bytes EERAM
PDF  47 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  NSC [National Semiconductor (TI)]
Página de inicio  http://www.national.com
Logo NSC - National Semiconductor (TI)

COP8SE Datasheet(HTML) 25 Page - National Semiconductor (TI)

Back Button COP8SE Datasheet HTML 21Page - National Semiconductor (TI) COP8SE Datasheet HTML 22Page - National Semiconductor (TI) COP8SE Datasheet HTML 23Page - National Semiconductor (TI) COP8SE Datasheet HTML 24Page - National Semiconductor (TI) COP8SE Datasheet HTML 25Page - National Semiconductor (TI) COP8SE Datasheet HTML 26Page - National Semiconductor (TI) COP8SE Datasheet HTML 27Page - National Semiconductor (TI) COP8SE Datasheet HTML 28Page - National Semiconductor (TI) COP8SE Datasheet HTML 29Page - National Semiconductor (TI) Next Button
Zoom Inzoom in Zoom Outzoom out
 25 / 47 page
background image
8.0 Interrupts (Continued)
8.3.1 VIS Execution
When the VIS instruction is executed it activates the arbitra-
tion logic. The arbitration logic generates an even number
between E0 and FE (E0, E2, E4, E6 etc...) depending on
which active interrupt has the highest arbitration ranking at
the time of the 1st cycle of VIS is executed. For example, if
the software trap interrupt is active, FE is generated. If the
external interrupt is active and the software trap interrupt is
not, then FA is generated and so forth. If the only active inter-
rupt is software trap, than E0 is generated. This number re-
places the lower byte of the PC. The upper byte of the PC re-
mains unchanged. The new PC is therefore pointing to the
vector of the active interrupt with the highest arbitration rank-
ing. This vector is read from program memory and placed
into the PC which is now pointed to the 1st instruction of the
service routine of the active interrupt with the highest arbitra-
tion ranking.
Figure 19 illustrates the different steps performed by the VIS
instruction.
Figure 20 shows a flowchart for the VIS instruc-
tion.
The non-maskable interrupt pending flag is cleared by the
RPND (Reset Non-Maskable Pending Bit) instruction (under
certain conditions) and upon RESET.
DS100973-29
FIGURE 19. VIS Operation
www.national.com
25



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47


Datasheet Descarga

Go To PDF Page


Enlace URL



¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Enlace a la hoja de datos    |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com