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PCI9060ES Datasheet(PDF) 189 Page - List of Unclassifed Manufacturers |
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PCI9060ES Datasheet(HTML) 189 Page - List of Unclassifed Manufacturers |
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189 / 192 page ![]() SECTION 8 PCI 9080 TIMING DIAGRAMS ©PLX Technology, Inc., 1997 Page 180 Version 1.02 A DOES NOT CHANGE, UNALIGNED HAS OWN CYCLE WITH ADS# D0 D1 D9 D2 D3 D4 D6 D7 D8 LAD[3:2] D5 A+40 D10 Owned by local bus or another bus master DMA continues where it left off Give up local bus when programmable BREQ is asserted 0ns 250ns 500ns LCLK LHOLD LHOLDA ADS# ALE BLAST# LBE[3:0]# LW/R# LAD[31:0] LABS[3:2] DT/R# DEN# BTERM# READYi# BREQ DMA burst suspended by BREQ. No wait states, burst enabled, Bterm enabled, 32 bit local bus. Timing Diagram 8-78. (J Mode) PCI 9080 Write to Local Bus BREQ Asserted |
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