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PCI9060ES Datasheet(PDF) 175 Page - List of Unclassifed Manufacturers

No. de pieza PCI9060ES
Descripción Electrónicos  12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS
PDF  192 Pages
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PCI9060ES Datasheet(HTML) 175 Page - List of Unclassifed Manufacturers

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SECTION 8
PCI 9080
TIMING DIAGRAMS
©PLX Technology, Inc., 1997
Page 166
Version 1.02
CMD
BE
D0
D1
D2
D3
D4
+4
+8
+10
D0
D1
D2
D3
+C
D4
D7
D6
D5
D8
D9 D10 D11 D12 D13 D14
D15
D5
D6
D7
D8
+14 +18
+1C
+20
ADDR
0ns
250ns
500ns
750ns
CLK
FRAME#
AD[31:0]
C/BE[3:0]#
IRDY#
DEVSEL#
TRDY#
LCLK
LHOLD
LHOLDA
ADS#
LW/R#
BLAST#
LA[31:2]
LD[31:0]
READYi#
Latency Timer = 7 CLK, Pause Timer = 4 CLK.
PCI 9080 has internally added another clock to the pause timer.
Therefore, the time when LHOLD is de-asserted to when it is re-asserted is 5 CLKS for a pause timer of 4 CLK.
Timing Diagram 8-63. (C Mode) DMA PCI to Local with Local Pause Timer and Local Latency Timer



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