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DP8464B Datasheet(PDF) 17 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No. de pieza DP8464B
Descripción Electrónicos  Disk Pulse Detector
PDF  26 Pages
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Fabricante Electrónico  NSC [National Semiconductor (TI)]
Página de inicio  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP8464B Datasheet(HTML) 17 Page - National Semiconductor (TI)

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Application Information (Continued)
The simplest operation is for systems operating entirely in
Region 1 that is no amplitude reduction between the high-
est and the lowest frequency at the inner track The inner
track is specified because the pulse interaction is most se-
vere on the inner track For Region 1 operation only the
Time Channel filter is required so the Gate Channel Input is
connected to the Time Channel Input Since no external
time delay is required to align the time and gate channels
the Time Pulse Out is connected directly to the Time Pulse
In The Region 1 connection is shown in
Figure 2 The inter-
nal timing for this operation is shown in
Figure 13
If there is significant amplitude reduction at the highest fre-
quency the peak detection becomes more complex If the
worst case waveform is like the fourth waveform on
Figure
14 then the Region 1 connection might still work satisfacto-
rily However if the input begins to approach the fifth wave-
form this system configuration will completely fail One
problem is that the AGC will respond to the frequency de-
pendent amplitude modulation and distort the waveform
Figure 16 illustrates this problem which is encountered in
systems operating in Region 2 If the input digital pattern
suddenly shifts from a high frequency to a low frequency
the bit density may shift from the 70% level on the BPI
curve of
Figure 1 to a point at 90% on the BPI curve As
shown the AGC loop is correcting for this frequency-in-
duced change in amplitude by quickly decreasing the ampli-
fier gain The situation gets worse if the input digital pattern
shifts back to a high frequency The AGC loop now cannot
quickly increase the amplifier gain so the output waveform
will very slowly increase The AGC response to frequency
related amplitude change is not desirable since the AGC is
now distorting the input waveform This can be prevented by
inserting a lead network between the Gain Controlled Ampli-
fier’s output and the AGC input as shown in
Figure 17 This
will increase the amplitude of the higher frequency into the
AGC thereby preventing the AGC from changing gain
Another problem encountered in Region 2 operation is that
the amplitude of the highest frequency may be so low that it
may not trip the hysteresis level If this happens these
peaks would not be gated on to the output This problem
can also be corrected by placing a separate filter to the
gating channel which will make the amplitude of the highest
frequency equal the amplitude of the lowest frequency This
is illustrated in the following example
Consider a disk system which uses the 27 code and has an
input at the inner track which looks like the fifth waveform in
Figure 15 Since the flux density on the outer track is 117
times the flux density of the inner track the outer track
waveform will look like the third waveform One filter cannot
perfectly compensate both these extremes so we design to
compensate a waveform between these two The track
which is
of the way in towards the inner track is a good
compromise The filter in this example is a single zero
placed such that the lowest frequency followed by the high-
est frequency have the same amplitude on the track
of
the way in
Figure 18 shows the operation of the inner track
of this example While the gating channel filter has made
the amplitudes of the two frequencies nearly the same the
time relationship to the Time Channel Input has not been
preserved The proper operation is to have the positive
edge of the signal at the Time Pulse In pin which corre-
sponds to a peak be the first positive edge after the output
of the comparator has changed states This can be accom-
plished either of two ways One way is to insert an external
delay between the Time Pulse Out and the Time Pulse In as
shown in
Figure 18 The required delay can be determined
by comparing the Time Pulse Out to the Channel Alignment
Output with both external filters in the circuit Another way is
to design the Time Channel Filter with more group delay
This will probably require additional poles
Figure 19 shows the outer track operation of our example
Notice how the system has taken care of the shoulder-in-
duced-noise on the Time Pulse Out The external delay has
shifted the Time Pulse In so the noise is not clocking in new
data to the flip-flop It is important to select this delay such
that the positive edge corresponding to a signal peak is al-
ways the first positive edge after the output of the compara-
tor has changed states
While the gating filter has equalized the amplitudes between
the highest and the lowest frequency the amplitude be-
tween the inner and the outer track has not been held con-
stant This can be seen by comparing the Gate Channel
Input between
Figure 18 and Figure 19 In order to avoid
saturating the Gain Controlled Amplifier the voltage on the
VREF pin must be set so that the voltage out of the Gain
Controlled Amplifier is 4 Vpp or less for all tracks The low
frequency signal on the inner track contains far more funda-
mental frequency than the low frequency signal on the outer
track Consequently the low frequency inner track signal
will experience more attenuation than the low frequency
outer track signal in passing through the gating channel fil-
ter which for this example has been optimized to pass
higher frequencies The AGC tends to hold the input to the
gating channel constant for a fixed VREF level Therefore
the largest output from the Gain Controlled Amplifier is for
the low frequency inner track signal The voltage on VREF
should be adjusted so that the differential output swing of
the Gain Controlled Amplifier is 4 Vpp maximum for this
signal This means that the output voltage on the outer track
will be less than 4 Vpp
TLF5283 – 22
FIGURE 16 Improper AGC Response to Region 2 Signal
17



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