LS840-2 datasheet(1/2 Pages) LINEAR

No. de pieza	LS840-2

Descripción Electrónicos	LOW NOISE LOW DRIFT LOW CAPACITANCE MONOLITHIC DUAL N-CHANNEL JFET

PDF	2 Pages

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Fabricante Electrónico	LINEAR [Linear Integrated Systems]

Página de inicio	http://www.linearsystems.com

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Linear Integrated Systems

Linear Integrated Systems 4042 Clipper Court, Fremont, CA 94538 • TEL: (510) 490-9160 • FAX: (510) 353-0261

1

7

35

BOTTOM VIEW

2

6

31 X 32 MILS

D1

G1

S2

S1

G2

D2

FEATURES

LOW NOISE

e

n

= 8nV/

√Hz TYP.

LOW LEAKAGE

I

G

= 10pA TYP.

LOW DRIFT

|

∆V

GS1-2

/

∆T|= 5µV/°C max.

LOW OFFSET VOLTAGE

IV

GS1-2

I= 2mV TYP.

ABSOLUTE MAXIMUM RATINGS NOTE 1

@ 25

°C (unless otherwise noted)

Maximum Temperatures

Storage Temperature

-65

° to +150°C

Operating Junction Temperature

+150

°C

Maximum Voltage and Current for Each Transistor NOTE 1

-V

GSS

Gate Voltage to Drain or Source

60V

-V

DSO

Drain to Source Voltage

60V

-I

G(f)

Gate Forward Current

50mA

Maximum Power Dissipation

Device Dissipation @ Free Air - Total

400mW @ +125

°C

G1

S2

S1

G2

D1

D2

ELECTRICAL CHARACTERISTICS @ 25

°C (unless otherwise noted)

SYMBOL

CHARACTERISTICS

LS840

LS841 LS842

UNITS

CONDITIONS

|

∆V

GS1-2

/

∆T| max. Drift vs. Temperature

5

10

40

µV/°C

V

DG

= 20V

I

D

= 200

µA

T

A

= -55

°C to +125°C

|V

GS1-2

| max.

Offset Voltage

5

10

25

mV

V

DG

= 20V

I

D

= 200

µA

LS840 LS841 LS842

LOW NOISE LOW DRIFT

LOW CAPACITANCE

MONOLITHIC DUAL N-CHANNEL JFET

SYMBOL

CHARACTERISTICS

MIN.

TYP.

MAX.

UNITS

CONDITIONS

BV

GSS

Breakdown Voltage

60

--

V

DS

= 0

I

D

= 1nA

BV

GGO

Gate-to-Gate Breakdown

60

--

V

I

G

= 1nA

I

D

= 0

I

S

= 0

TRANSCONDUCTANCE

Y

fss

Full Conduction

1000

4000

µmho

V

DG

= 20V

V

GS

= 0

f= 1kHz

Y

fs

Typical Conduction

500

1000

µmho

V

DG

= 20V

I

D

= 200

µA

|Y

fs1-2

/Y

fs

|

Mismatch

--

0.6

3

%

DRAIN CURRENT

I

DSS

Full Conduction

0.5

2

5

mA

V

DG

= 20V

V

GS

= 0

|I

DSS1-2

/I

DSS

|

Mismatch at Full Conduction

--

1

5

%

GATE VOLTAGE

V

GS

(off) or V

P

Pinchoff Voltage

1

2

4.5

V

DS

= 20V

I

D

= 1nA

V

GS

Operating Range

0.5

--

4

V

DS

= 20V

I

D

= 200

µA

GATE CURRENT

-I

G

Operating

--

10

50

pA

V

DG

= 20V

I

D

= 200

µA

-I

G

High Temperature

--

50

nA

V

DG

= 20V

I

D

= 200

µAT

A

= +125

°C

-I

G

Reduced VDG

--

5

--

pA

V

DG

= 10V

I

D

= 200

µA

-I

GSS

At Full Conduction

--

100

pA

V

DG

= 20V

V

DS

= 0

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