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MPC185TS Datasheet(PDF) 2 Page - Motorola, Inc

No. de pieza MPC185TS
Descripción Electrónicos  Security Processor
PDF  12 Pages
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Fabricante Electrónico  MOTOROLA [Motorola, Inc]
Página de inicio  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

MPC185TS Datasheet(HTML) 2 Page - Motorola, Inc

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MPC185 Security Processor Technical Summary
MOTOROLA
are the only devices on the market capable of executing elliptic curve cryptography which is especially
important for secure wireless communications.
MPC185 features include the following:
2 Public Key Execution Units (PKEUs) that support the following:
— RSA and Diffie-Hellman
– Programmable field size up to 2048-bits
— Elliptic curve cryptography
– F2m and F(p) modes
– Programmable field size up to 511-bits
2 Data Encryption Standard Execution Units (DEUs)
— DES, 3DES
— Two key (K1, K2, K1) or Three Key (K1, K2, K3)
— ECB and CBC modes for both DES and 3DES
2 Advanced Encryption Standard Units (AESUs)
— Implements the Rinjdael symmetric key cipher
— ECB, CBC, and counter modes
— 128, 192, 256 bit key lengths
1 ARC Four Execution Unit (AFEUs)
— Implements a stream cipher compatible with the RC4 algorithm
— 40- to 128-bit programmable key
2 Message Digest Execution Units (MDEUs)
— SHA with 160-bit or 256-bit message digest
— MD5 with 128-bit message digest
— HMAC with either algorithm
1 Kasumi Execution Unit for 3GPP systems (KEUs)
— Implements F8 algorithm for encryption and F9 algorithm for authentication
1 Random number generator (RNGs)
60x compliant external bus interface, with master/slave logic
— 32-bit address/64 -bit data
— Up to 100 MHz operation
4 Crypto-channels, each supporting multi-command descriptor chains
— Static and/or dynamic assignment of crypto-execution units via an integrated controller
— Buffer size of 512 bytes for each execution unit, with flow control for large data sizes
32KB of internal scratchpad memory for key, IV and context storage
1.5V supply, 3.3V and 2.5V I/O
256 MAP BGA, 17 x 17mm package body size
1.5W power dissipation
4 Typical System Architecture
The MPC185 is designed to integrate easily into any system using the 60x bus protocol. It is ideal in any
system using a Motorola PowerQUICC II communications processor (as shown in Figure 4-1) or a
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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