DS2164Q datasheet(9/17 Pages) DALLAS

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DS2164Q

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HARDWARE MODE

The hardware mode is intended for applications that do not have an external controller available or do not

require the extended features offered by the serial port. Connecting the SPS pin to VSS disables the serial

port, clears all internal register bits, and maps the IPD, U/ A , and CP/ EX bits for both channels to external

bits (Table 3). In the hardware mode, both the input and output time slots default to time slot 0.

Table 3. HARDWARE MODE

NAME

FUNCTION

4A0

CP/ EX

(Channel X)

Channel X Coding Configuration

0 = Expand

1 = Compress

5A1

AS0/AS1/AS2

(Channel X and Y)

Algorithm Select (Table 4)

6A2

U/ A

(Channel X)

Channel X Data Format

0 = A-law

1 =

m-law

7A3

CP/ EX

(Channel Y)

Channel Y Coding Configuration

0 = Expand

1 = Compress

8A4

AS0/AS1/AS2

(Channel X and Y)

Algorithm Select (Table 4)

9A5

U/ A

(Channel Y)

Channel Y Data Format

0 = A-law

1 =

m-law

SDI

IPD

(Channel Y)

Channel Y Idle Select

0 = Channel Active

1 = Channel Idle

IPD

(Channel X)

Channel X Idle Select

0 = Channel Active

1 = Channel Idle

NOTES:

1) SCLK must be connected to VSS when the hardware mode is selected.

2) When both channels are idled, power consumption is significantly reduced.

3) The DS2164Q powers up within 800ms after either channel is returned to active from an idle state.

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