PC87373 datasheet(138/174 Pages) NSC

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11.0 Musical Instrument Digital Interface (MIDI) Port (Continued)

138

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Revision 1.1

11.3.5 MIDI Command Register (MCOM)

This write register is a port via which commands are issued by the host to the MIDI Port.

Power Well: VDD3

Location:

Offset 01h

Type:

11.3.6 MIDI Control Register (MCNTL)

This register controls enhanced MIDI functions.

Power Well: VDD3

Location:

Offset 02h

Type:

R/W

Bit

76543210

Name

Command Byte

Reset

XXXXXXXX

Bit

76543210

Name

Loopback

Mode

Enable

MIDI Thru

Enable

Reserved

Pass-Thru

Transmit

Enable

Rx Data

Ready

Interrupt

Enable

MDTX Pin

Masking

Enable

Tx Buffer

Empty

Interrupt

Enable

Rx FIFO

Enable for

Pass-Thru

Mode

Reset

00001001

Required

Bit

Type

Description

R/W

Loopback Mode Enable. When this bit is enabled, the MIDI Receive signal is internally connected to

the MIDI Transmit signal.

0: Disabled (default)

1: Enabled

R/W

MIDI Thru Enable. When this bit is enabled, the MDRX pin is internally connected to the MDTX pin,

which then reﬂects the MIDI Receive signal. When this bit is disabled, the MDTX pin is driven with data

coming from the MIDI Port transmit engine.

0: Disabled (default)

1: Enabled

Reserved. Must be 0.

R/W

Pass-Thru Transmit Enable. When this bit is enabled, data is transmitted in Pass-Thru (non-UART)

mode.

0: Disabled (default)

1: Enabled

R/W

Rx Data Ready Interrupt Enable. When this bit is enabled, an interrupt request is asserted in

response to a Receive Data Ready event.

0: Disabled

1: Enabled (default)

R/W

MDTX Pin Masking Enable. When this bit is enabled, the MDTX pin is constantly driven high by the

MIDI Port. When disabled, MDTX serves as the MIDI Port transmit line.

0: Disabled (default)

1: Enabled

R/W

Tx Buffer Empty Interrupt Enable. When this bit is enabled, an interrupt request is asserted in

response to a Transmit Buffer Empty event.

0: Disabled (default)

1: Enabled

PC87373 Datasheet(PDF) 138 Page - National Semiconductor (TI)

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