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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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LAN9211 Datasheet(PDF) 101 Page - SMSC Corporation |
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LAN9211 Datasheet(HTML) 101 Page - SMSC Corporation |
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101 / 147 page  High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support Datasheet SMSC LAN9211 101 Revision 2.9 (03-01-12) DATASHEET 5.3.23 E2P_CMD – EEPROM Command Register This register is used to control the read and write operations with the Serial EEPROM. Offset: B0h Size: 32 bits BITS DESCRIPTION TYPE DEFAULT 31 EPC Busy: When a 1 is written into this bit, the operation specified in the EPC command field is performed at the specified EEPROM address. This bit will remain set until the operation is complete. In the case of a read this means that the host can read valid data from the E2P data register. The E2P_CMD and E2P_DATA registers should not be modified until this bit is cleared. In the case where a write is attempted and an EEPROM is not present, the EPC Busy remains busy until the EPC Time-out occurs. At that time the busy bit is cleared. Note: EPC busy will be high immediately following power-up or reset. After the EEPROM controller has finished reading (or attempting to read) the MAC address from the EEPROM the EPC Busy bit is cleared. SC 0 |
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