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LAN9211 Datasheet(PDF) 13 Page - SMSC Corporation

No. de pieza LAN9211
Descripción Electrónicos  High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
PDF  147 Pages
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Fabricante Electrónico  SMSC [SMSC Corporation]
Página de inicio  http://www.smsc.com
Logo SMSC - SMSC Corporation

LAN9211 Datasheet(HTML) 13 Page - SMSC Corporation

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High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support
Datasheet
SMSC LAN9211
13
Revision 2.9 (03-01-12)
DATASHEET
1.11
Host Bus Interface (SRAM Interface)
The host bus interface provides a FIFO interface for the transmit and receive data paths, as well as
an interface for the LAN9211 Control and Status Registers (CSR’s).
The host bus interface is the primary bus for connection to the embedded host system. This interface
models an asynchronous SRAM. TX FIFO, RX FIFO, and CSR’s are accessed through this interface.
Programmed I/O transactions are supported.
The LAN9211 host bus interface supports 16-bit bus transfers. Internally, all data paths are 32-bits
wide. The LAN9211 can be interfaced to either Big-Endian or Little-Endian processors and includes
mixed endian support for FIFO accesses.



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