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LM4832 Datasheet(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No. de pieza LM4832
Descripción Electrónicos  Digitally Controlled Tone and Volume Circuit with Stereo Audio Power Amplifier, Microphone Preamp Stage and National 3D Sound
PDF  22 Pages
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Fabricante Electrónico  NSC [National Semiconductor (TI)]
Página de inicio  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM4832 Datasheet(HTML) 3 Page - National Semiconductor (TI)

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Electrical Characteristics for Entire IC(Notes 1, 2) (Continued)
The following specifications apply for V
DD = 5V unless otherwise noted. Limits apply for TA = 25˚C.
Symbol
Parameter
Conditions
LM4832
Units
(Limits)
Typical
(Note 6)
Limit
(Note 7)
AUDIO PATH
P
O
Output Power
THD = 1.0% (max),f=1 kHz, All
controls at 0dB
R
L =8Ω
250
mW (min)
R
L =32Ω
95
75
mW (min)
THD+N
Total Harmonic Distortion+Noise
All Controls at 0 dB, THD = 10%,f=1
kHz
R
L =8Ω
350
mW
P
O = 200 mW, RL =8Ω
0.15
%
P
O = 75 mW, RL =32Ω
0.11
%
V
O = 1 Vrms, RL =10Ω
0.08
%
PSRR
Power Supply Rejection Ratio
C
B = 1 µF, f = 100 Hz, VRIPPLE = 100
mVrms, All Controls at 0 dB Setting
45
dB
A
M
Mute Attenuation
f = 1 kHz, V
IN = 1V
−75
dB
X
TALK
Cross Talk
P
O = 200 mW, RL =8Ω,
All controls at 0 dB setting,
f=1kHz
Left to Right
−85
dB
Right to Left
−72
dB
MICROPHONE PREAMP AND VOLUME CONTROL
A
V
Preamp Gain
0 dB Gain
0
−1, 1
dB
+20 dB Gain
20
19, 21
dB
+30 dB Gain
30
29, 31
dB
A
R
Attenuator Range
Gain at +18 dB Setting
20
dB (max)
Attenuation at −42 dB Setting
−43
dB (min)
A
S
Step Size
0 dB to −42 dB
3
dB
Step Size Error
0.4
dB (max)
V
SWING
Output Voltage Swing
f = 1 kHz, THD < 1.0%,R
L =1kΩ
1.7
V
rms
E
NO
Input Referred Noise
A-Weighted, Attenuator at 0 dB
7
µV (min)
PSRR
Power Supply Rejection Ratio
f = 100 Hz, V
RIPPLE = 100 mVrms,
C
B =1µF
35
dB
A
M
Mute Attenuation
−90
dB
X
TALK
Cross Talk
Power Amp P
O =200 mW,f=1kHz
−90
dB
THD+N
Total Harmonic Distortion Plus Noise
All controls at 0 dB,f=1 kHz, V
O =1V
0 dB Setting
0.03
%
+20 dB Gain
0.03
%
+30 dB Gain
0.04
%
I
2C BUS TIMING
f
MAX
Maximum Bus Frequency
400
kHz
T
START:HOLD
Start Signal: Hold Time before
Clock/Data Transitions
0.6
µs
T
D;SETUP
Data Setup Time
0.1
µs
T
C;HIGH
Minimum High Clock Duration
0.6
µs
T
C;LOW
Minimum Low Clock Duration
1.3
µs
T
STOP;SETUP
Stop Signal: Setup Time before
Clock/Data Transitions
0.6
µs
I
2C BUS INPUT AND OUTPUT
V
IL
Input Low Voltage
1.5
V (max)
3
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