AM79C970 datasheet(29/168 Pages) AMD

29 / 168 page

AMD

P R E L I M I N A R Y

1-896

Am79C970

Target Abort

Figure 9 shows a target abort sequence. The target as-

serts

DEVSEL for one clock. It then deasserts DEVSEL

and asserts

STOP on clock 4. A target can use the target

abort sequence to indicate that it cannot service the data

transfer and that it does not want the transaction to be

retried. Additionally, the PCnet-PCI controller cannot

make any assumption about the success of the previous

data transfers in the current transaction. The PCnet-PCI

controller terminates the current transfer with the

deassertion of

FRAME on clock 5 and one clock cycle

later with the deassertion of

IRDY. It finally releases the

bus on clock 6.

Since data integrity is not guaranteed, the PCnet-PCI

controller cannot recover from a target abort event. The

PCnet-PCI controller will reset all CSR and BCR loca-

tions to their H_RESET values. Any on-going network

activity will be stopped immediately. The PCI configura-

tion registers will not be cleared. RTABORT (bit 12) in

the Status register will be set to indicate that the PCnet-

PCI controller has received a target abort.

18220C-11

FRAME

CLK

IRDY

TRDY

DEVSEL

REQ

GNT

123456

DATA

0000

0111

PAR

DEVSEL is sampled by the PCnet-PCI controller.

STOP

ADDR

Figure 9. Target Abort

AM79C970 Datasheet(PDF) 29 Page - Advanced Micro Devices

AM79C970 Datasheet(HTML) 29 Page - Advanced Micro Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Descarga

Enlace URL