AD5671R datasheet(21/28 Pages) AD

21 / 28 page

AD5676

Data Sheet

Rev. B | Page 20 of 27

SERIAL INTERFACE

The AD5676 has a 3-wire serial interface (SYNC, SCLK, and

SDI) that is compatible with SPI, QSPI™, and MICROWIRE

interface standards as well as most DSPs. See Figure 2 for a

timing diagram of a typical write sequence. The AD5676 contains

an SDO pin that allows the user to daisy chain multiple devices

together (see the Daisy-Chain Operation section) or for readback.

Input Shift Register

The input shift register of the AD5676 is 24 bits wide. Data

is loaded MSB first (DB23), and the first four bits are the

command bits, C3 to C0 (see Table 9), followed by the 4-bit

DAC address bits, A3 to A0 (see Table 10), and finally, the 16-

bit data-word.

The data-word comprises 16-bit input code, followed by zero, two,

or four don’t care bits. These data bits are transferred to the input

rising edge of SYNC.

Commands execute on individual DAC channels, combined DAC

channels, or on all DACs, depending on the address bits selected.

Table 9. Command Bit Definitions

Command

Description

No operation

Write to Input Register n (where n = 1 to 8,

depending on the DAC selected from the

address bits in Table 10), dependent

on LDAC

Update the DAC register with contents of

Input Register n

Write to and update DAC Channel n

Power down/power up the DAC

Hardware LDAC mask register

Software reset (power-on reset)

Gain setup register (LFCSP package only)

Set up the DCEN register (daisy-chain

enable)

Set up the readback register (readback

enable)

Update all channels of the input register

simultaneously with the input data

Update all channels of the DAC register

and input register simultaneously with

the input data

Reserved

…

Reserved

Table 10. Address Bits and Selected DACs

Address Bits

Selected Output DAC

Channel1

DAC 0

DAC 1

DAC 2

DAC 3

DAC 4

DAC 5

DAC 6

DAC 7

Any combination of DAC channels can be selected using the address bits.

ADDRESS BITS

COMMAND BITS

D15 D14 D13 D12 D11 D10

DB23 (MSB)

DB0 (LSB)

DATA BITS

Figure 43. Input Shift Register Content

AD5671R Datasheet(PDF) 21 Page - Analog Devices

AD5671R Datasheet(HTML) 21 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

Datasheet Descarga

Enlace URL