IOBUS12 datasheet(23/88 Pages) FTDI

23 / 88 page

C opyright © Future T ec hnology Devic es I nternational Limited

Datasheet

Vinculum-II Embedded Dual USB Host Controller IC

V ers ion 1 .7

Doc ument N o.: FT _000138 C learance N o.: FT DI# 1 43

4.2.5 Peripheral DMA Modules 0, 1, 2 & 3

The peripheral DMA has the capability to transfer data to and from an I/O device. The CPU can offload

the transfer of data between the processor and the peripheral freeing the CPU to execute other

instructions.

The DMA module collects or transmits data from memory to an I/O address space; it is also capable of

copying data in memory and transferring it to another location.

The DMA is not accessible by the user as it automatically controlled by the CPU.

4.2.6 RAM Module

The RAM module consists of 16k bytes on-chip (4k x 32-bits) data memory. The RAM is byte addressable.

4.2.7 Peripheral Interface Modules

VNC2 has nine peripheral interface modules. Full descriptions of each module are described in section 6.



Debugger Interface



UART



PWM



FIFO



SPI Master



SPI Slave 0 & 1



GPIO - General purpose I/O pins



General purpose timers

4.2.8 USB Transceivers 0 and 1

Two USB transceiver cells provide the physical USB device interface supporting USB 1.1 and USB 2.0

standards. Low-speed and full-speed USB data rates are supported. Each output driver provides +3.3V

level slew rate control signalling, whilst a differential receiver and two single ended receivers provide USB

DATA IN, SE0 and USB Reset condition detection. These cells also include integrated internal USB pull-up

or pull-down resistors as required for host or slave mode.

4.2.9 USB Host / Device Controllers

These blocks handle the parallel-to-serial and serial-to-parallel conversion of the USB physical layer. This

includes bit stuffing, CRC generation, USB frame generation and protocol error checking. The Host /

Device controller is autonomous and therefore requires limited load from the CPU.

4.2.10 12MHz Oscillator

The 12MHz Oscillator cell generates a 12MHz reference clock input to the Clock Multiplier PLL from an

external 12MHz crystal. The external crystal is connected across Pin 4 – XTIN and Pin 5 – XTOUT in the

configuration shown in Figure 10.1.

4.2.11 Power Saving Modes and Standby mode.

VNC2 can be set to operate in three frequencies allowing the user to select a slower speed to reduce

power consumption. Three operating frequencies available are 12MHz, 24MHz and normal operation of

48MHz. These operating modes can be configured using the RTOS. Full details are available in the RTOS

manual available from the FTDI website.

When a particular peripheral is not used, it is powered down internally thus saving power.

Standby mode is available under firmware control, this mode puts the VNC2 in a state with no clocks

running or system blocks powered. The device will wake up out of this mode by toggling any of the

following signals: USB0/1 DP or DM, SPI slave 0 select (spi_s0_ss#), SPI slave 1select (spi_s1_ss#) or

UART ring indicator (uart_ri#).

IOBUS12 Datasheet(PDF) 23 Page - Future Technology Devices International Ltd.

IOBUS12 Datasheet(HTML) 23 Page - Future Technology Devices International Ltd.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88

Datasheet Descarga

Enlace URL