SPC56AP54x datasheet(23/105 Pages) STMICROELECTRONICS

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DocID18340 Rev 6

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SPC56xP54x, SPC56xP60x

Introduction

104

The DSPI modules provide these features:



Full duplex, synchronous transfers



Master or slave operation



Programmable master bit rates



Programmable clock polarity and phase



End-of-transmission interrupt flag



Programmable transfer baud rate



Programmable data frames from 4 to 16 bits



Up to 28 chip select lines available

–

8 each on DSPI_0 and DSPI_1

–

4 each on DSPI_2, DSPI_3, and DSPI_4



8 clock and transfer attributes registers



Chip select strobe available as alternate function on one of the chip select pins for

deglitching



FIFOs for buffering up to 5 transfers on the transmit and receive side



Queueing operation possible through use of the eDMA



General purpose I/O functionality on pins when not used for SPI

1.5.23

eTimer

Two eTimer modules are provided, each with six 16-bit general purpose up/down

timer/counter per module. The following features are implemented:



Individual channel capability

–

Input capture trigger

–

Output compare

–

Double buffer (to capture rising edge and falling edge)

–

Separate prescaler for each counter

–

Selectable clock source

–0 % to 100% pulse measurement

–

Rotation direction flag (Quad decoder mode)



Maximum count rate

–

Equals peripheral clock/2 — for external event counting

–

Equals peripheral clock — for internal clock counting



Cascadeable counters



Programmable count modulo



Quadrature decode capabilities



Counters can share available input pins



Count once or repeatedly



Preloadable counters



Pins available as GPIO when timer functionality not in use

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