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STBCFG01 Datasheet(PDF) 28 Page - STMicroelectronics |
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STBCFG01 Datasheet(HTML) 28 Page - STMicroelectronics |
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28 / 37 page ![]() I²C compatible interface registers STBCFG01 28/37 DocID026474 Rev 3 Table 21: CHG_Cfg4 register format (register address: 93h) b7 b6 b5 b4 b3 b2 b1 b0 POR R/W RID_STAT LDO_en LDO_UVLO_th WD PreB_en THRML TFAST TPRE 4Fh R/W TPRE: pre-charge timer enable 0: disabled 1: enabled (default) TFAST: fast charge timer enable 0: disabled 1: enabled (default) THRML: thermal loop enable (this bit can be masked through OTP) 0: disabled 1: enabled (default) PreB_en: pre-bias function enable 0: disabled 1:enabled (default) WD: watchdog timer function enable 0: disabled (default) 1: enabled LDO_UVLO_th: LDO UVLO threshold 0:3.6 V rising, 3.5 V falling (default) 1: 4.75 V rising, 4.65 V falling LDO_en: LDO output enable 0: LDO output disabled 1:LDO output enabled (default) RID_STAT: RID status (read only) 0: RID connected 1: RID disconnected Table 22: CHG_Cfg5_OTG_Status register format (register address: 94h) b7 b6 b5 b4 b3 b2 b1 b0 POR R/W BST_SH BST_status - DICHG_adj FSW CHG_rst 06h R/W b0, b1, b2 are R/W; b4, b5, b6, b7 are read status bit only. CHG_rst: charger reset, all charger registers to POR value. Self-clearing. 0: no action (default) 1: reset charger |
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