ADL5506ACBZ-R7 datasheet(17/24 Pages) AD

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ADL5506

Data Sheet

Rev. A | Page 16 of 23

THEORY OF OPERATION

The ADL5506 is a logarithmic detector (log amp), based on the

principle of successive compression. It is similar in design to the

AD8312 and is fabricated on an advanced BiCMOS process. It

comes in a smaller 0.8 mm × 1.2 mm WLCSP package and

offers 4.5 GHz RF bandwidth. Figure 41 shows the main

features of the ADL5506 in block schematic form.

The ADL5506 combines two key functions needed for the

measurement of signal level over a moderately wide dynamic

range. First, it provides the amplification needed to respond to

small signals in a chain of four amplifier/limiter cells, each having

a small signal gain of 10 dB and a bandwidth of approximately

4.5 GHz. At the output of each amplifier stage is a full wave

rectifier, essentially a square law detector cell that converts the

RF signal voltages to a fluctuating current with an average value

that increases with signal level. A further passive detector stage

is added preceding the first stage. Therefore, there are five

detectors, each separated by 10 dB, spanning about 50 dB of

dynamic range. The overall accuracy at the extremes of this

total range, viewed as the deviation from an ideal logarithmic

response, that is, the log conformance error, can be judged by

referencing Figure 5, Figure 7, and Figure 8, which show that

errors across the central 40 dB are moderate. These figures

show how the conformance to an ideal logarithmic function

varies with temperature, frequency, and supply voltage.

The output of these detector cells is in the form of a differential

current, making their summation a simple matter. It can easily

be shown that such summation closely approximates a logarithmic

function. This result is then converted to a voltage at the VLOG

pin through a high gain stage. This output is connected back to

a voltage-to-current (V-to-I) stage, in such a manner that VLOG

is a logarithmic measure of the RF input voltage with a slope

and intercept controlled by the design. For a fixed termination

resistance at the input of the ADL5506, a given voltage

corresponds to a certain power level.

The external termination added before the ADL5506 determines

the effective power scaling. This often takes the form of a

simple resistor (52.3 Ω provides a net 50 Ω input), but more

elaborate matching networks can be used. This impedance

determines the logarithmic intercept, the input power for which

the output crosses the baseline (VLOG = 0 V) if the function were

continuous for all values of input. Because this is never the case

for a practical log amp, the intercept refers to the value obtained

by the minimum error, straight line fit to the actual graph of

VLOG vs. input power. The quoted values in Table 1 assume a

sinusoidal (CW) signal. Where there is complex modulation, as

in CDMA, the calibration of the power response needs to be

adjusted accordingly. Where a true power (waveform independ-

ent) response is needed, consider the use of an rms responding

detector, such as the ADL5504.

However, in terms of the logarithmic slope, the amount by

which the output VLOG changes for each decibel of input change

(voltage or power), is, in principle, independent of waveform or

termination impedance. In practice, it usually falls off at higher

frequencies because of the declining gain of the amplifier stages

and other effects in the detector cells. For the ADL5506, the

slope at 30 MHz is 18.8 mV/dB and falls slightly as frequency

increases to about 16.7 mV/dB at 4.5 GHz. These values are

sensibly independent of temperature and almost completely

unaffected by supply voltages of 2.7 V to 5.5 V.

Figure 41. Block Schematic

10dB

DET

10dB

DET

10dB

DET

10dB

DET

–

CFLT

RFIN

COMM

OFFSET

COMPENSATION

V-I

BAND-GAP

REFERENCE

ENBL

VPOS

I-V

VLOG

ADL5506

ADL5506ACBZ-R7 Datasheet(PDF) 17 Page - Analog Devices

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